AY 2019 Graduate School Course Catalog

Field of Study SY: Computer Systems

2019/07/22

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開講学期
/Semester
2019年度/Academic Year  1学期 /First Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Tsuneo Tsukahara
担当教員名
/Instructor
Tsuneo Tsukahara, Yukihide Kohira
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/06
授業の概要
/Course outline
Because CMOS technologies are widely used in modern electronics, we need advanced knowledge of scaled CMOS devices. Moreover, recently the demand for mixed-signal LSIs, including analog and RF (Radio Frequency) circuits, is very rapidly increasing, especially for consumer electronics and communication equipments. This course concerns theoretical and practical aspects of CMOS devices and modeling. First, fundamentals of semiconductor devices, which are undergraduate level, will be reviewed and distributed-constant circuit models will be also provided. Then, in-depth modeling of MOS transistors will be introduced using the textbook (Chapters 2 to 5). This helps you design VLSIs using the deep sub-micron CMOS in the near future. Finally, design examples of mixed-signal LSIs will be overviewed.
授業の目的と到達目標
/Objectives and attainment
goals
At the end of the course the student should be able to:
・Explain the basic concepts of the semiconductor devices.
・Design CMOS VLSI chips.
・Understand MOS transistor models used for design of mixed-signal LSIs
・Forecast the future direction of VLSI technologies.
授業スケジュール
/Class schedule
1. Reviewing fundamentals of semiconductor devices (undergraduate level) (1)
2. Reviewing fundamentals of semiconductor devices (undergraduate level) (2)
3. Distributed-constant circuit models and thermal noise basics
4. Basic Device Physics (Chapter 2): MOS capacitors, High-field effects (1)
5. Basic Device Physics (Chapter 2): MOS capacitors, High-field effects (2)
6. MOSFET Devices (Chapter 3) (1)
7. MOSFET Devices (Chapter 3) (2)
8. CMOS Device Design (Chapter 4): Scaling, Variations of threshold voltage (1)
9. CMOS Device Design (Chapter 4): Scaling, Variations of threshold voltage (2)
10. CMOS Performance Factors (Chapter 5): Basic circuits, Parasitic elements (1)
11. CMOS Performance Factors (Chapter 5): Basic circuits, Parasitic elements (2)
12. CMOS Performance Factors (Chapter 5): Sensitivity of delay to device parameters, Advanced CMOS Devices (1)
13. CMOS Performance Factors (Chapter 5): Sensitivity of delay to device parameters, Advanced CMOS Devices (2)
14. Examples of mixed-signal LSIs: CMOS RF circuits etc.
教科書
/Textbook(s)
Y. Taur and T. H. Ning, "Fundamentals of Modern VLSI Devices", Cambridge University Press, ISBN 0-521-55959-6 (paperback), (1998).
成績評価の方法・基準
/Grading method/criteria
Report: 100%
At the end of the course, topics are given to students. They are required to survey and study about the topics by themselves.
履修上の留意点
/Note for course registration
The following or related under graduate courses are recommended to take:
・Semiconductor Devices (半導体デバイス)
・VLSI Design (VLSI設計技術)
・Electronics (電子回路)
参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
1. T. Tsividis, “Operation and Modeling of the MOS Transistors,” 2nd Edition, ISBN 0-07-065523-5, (1999).
2. T. Tsukahara, “Design of CMOS RF Circuits,” Maruzen, ISBN: 978-4-621-08203-4, (2009) (in Japanese).

[Note] The course instructor Tsuneo Tsukahara has practical working experience. He worked for NTT labs for 25 years where he was involved in R&D of semiconductor integrated circuits and CMOS LSI chips for communication systems. Based on his experience, he can teach more advanced contents of CMOS devices.


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開講学期
/Semester
2019年度/Academic Year  1学期 /First Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Abderazek Ben Abdallah
担当教員名
/Instructor
Abderazek Ben Abdallah, Hiroshi Saito
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/14
授業の概要
/Course outline
As we build increasingly complex parallel systems (e.g. MCSoCs/MPSoCs) one of the greatest challenges is in providing the interconnection networks that permit the system components to communicate.
These must be must be high-performance, scalable, simple to design with and power efficient. Network-on-chip architecture is an increasingly popular and feasible alternative to close the productivity gap and achieve the desired performance.
The first part of this course should help the student gain an appreciation of NoC approach.

The second part of this course is about advanced design and performance issues of
computers, such us Multicore Systems, design alternatives for I/O, direct memory access, etc.
授業の目的と到達目標
/Objectives and attainment
goals
After taking this course a student will be able to:

- Describe what interconnections (NoC, buses) are and describe their role in
connecting the major system components.

- Identify several approaches to processor implementations.

- Describe how a system identifies different sources of interrupts and
exceptions.
授業スケジュール
/Class schedule
1. Introduction
2. Parallel Computer System Organization
3. Network on Chip Building Blocks
4. Topology
5. Routing Algorithms 1
6. Routing Algorithms 2
7. Switching Mechanics and Flow Control
8. Title Architecture
9.  Multicore Hardware
10. Multicore Programming  
11. Advanced Memory Organization 1
12. Advanced Memory Organization 2
13. Advanced design issues in multicore-based embedded system
14. Course summary
教科書
/Textbook(s)
- Textbook:
Advanced Multicore Systems On-Chip: Architecture, On-Chip Network, Design, Publisher: Springer, 2017, ISBN-13: 978-9811060915, ISBN-10: 98110609162017.

- Various other materials prepared by the instructor.
成績評価の方法・基準
/Grading method/criteria
- Presentations  and class activities: 30 %
- Home work: 30 %
- Final Exam: 40 %
履修上の留意点
/Note for course registration
-Parallel Computer Architecture
-Computer Architecture and Organization
参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
Course web page and reference materials will be given during the first lecture.


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開講学期
/Semester
2019年度/Academic Year  3学期 /Third Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Abderazek Ben Abdallah
担当教員名
/Instructor
Abderazek Ben Abdallah, Junji Kitamichi
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/14
授業の概要
/Course outline
Embedded Real-time systems are systems that require timely responses to facilitate
their operation or they risk performance degradation or even total system failure.
This course introduces the various building blocks and underlying scientific and
engineering principles behind embedded real-time systems. It covers the integrated
hardware and software aspects of embedded processor architectures, along with
advanced topics such as real-time, resource and memory management, and RTOS
scheduling.
授業の目的と到達目標
/Objectives and attainment
goals
1. Learn advanced issues about embedded real-time system design and scheduling.
2. Learn how to program with real-time embedded architecture.
3. Learn and apply real-time principles that are used to drive critical embedded
systems.
授業スケジュール
/Class schedule
1. Introduction to Embedded Real-time Systems
2 Embedded Architectures
3 Interaction with Devices (buses, memory architectures, device drivers)
4.Concurrency (software and hardware interrupts, timers)
5. Real-time principles: multi-tasking, scheduling
6. Real-time principles: synchronization
7. Static Scheduling
8. Dynamic Scheduling
9  Real-time Operating System 1
10 Real-time Operating System 2
11. Implementation trade-offs
12. Profiling and code optimization (for performance and memory);
13. Embedded software (exception handling, loading, mode-switching,programming embedded systems).
14. Course Summary
教科書
/Textbook(s)
Real-Time Embedded Components and Systems, By Sam Siewert
Hardcover: 384 pages
Publisher: Charles River Media; 1 edition (June 27, 2006)
Language: English
ISBN-10: 1584504684
ISBN-13: 978-1584504689
成績評価の方法・基準
/Grading method/criteria
- Presentations  and class activities: 30 %
- Home work: 30 %
- Final Exam: 40 %
履修上の留意点
/Note for course registration
Knowledge about Embedded Systems, Computer Architecture/organization.
参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
Course web page and reference materials will be given during the first lecture.


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開講学期
/Semester
2019年度/Academic Year  2学期 /Second Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Junji Kitamichi
担当教員名
/Instructor
Junji Kitamichi, Yoichi Tomioka
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/06
授業の概要
/Course outline
In this course, many topics, Pipelining with out-order execution, memory hierachy, instruction/data level parallelism, and so on, which are adopted in the advanced computer architecture, such as high-performance general purpose computers, GPGPUs, embedded processors, are explained.
授業の目的と到達目標
/Objectives and attainment
goals
In this course, our students understand the computer architecture which keeps evolving and obtain the base for more advanced development of it. They can use the knowledge obtained in this lecture to research at their Lab.
授業スケジュール
/Class schedule
1: Introduction
2: Basic Concepts of Processor: In-order pipeline
3: Basic Concepts of Processor: Interrupt
4: Basic Concepts of Processor: Memory mapped I/O
5: Fundamentals of Quantitative Design and Analysis
6: Memory Hierarchy Design
7: Instruction-Level Parallelism: Basic
8: Instruction-Level Parallelism: Out of Order Pipeline
9: Data-Level Parallelism in Vector and SIMD Architectures
10: Data-Level Parallelism in GPU Architectures
11: Thread-Level Parallelism: Multi-core Processor
12: Thread-Level Parallelism: Cache system for Multi-core Processor
13-14 : Other topics
教科書
/Textbook(s)
2-4: Computer Organization and Design MIPS Edition

5-14: Computer Architecture, 6th Edition: A Quantitative Approach
成績評価の方法・基準
/Grading method/criteria
Mini Reports (40%) and  exam. (60%)
履修上の留意点
/Note for course registration
None
For undergraduate students, they should get the credits of Computer Architecture and Embedded Systems.
参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
CQ出版社 マイクロプロセッサ・アーキテクチャ入門 中森 章 著


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開講学期
/Semester
2019年度/Academic Year  3学期 /Third Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Hitoshi Oi
担当教員名
/Instructor
Hitoshi Oi, Alexander P. Vazhenin
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/13
授業の概要
/Course outline
Advanced Operating Systems is one of core courses in the graduate program at the University of Aizu, offered from the 3rd quarter of AY2012.
授業の目的と到達目標
/Objectives and attainment
goals
This is one of core courses in the graduate program in Computer Science and Engineering at the University of Aizu. The course covers from the basic design concepts of the modern operating systems to the case studies in the actual implementations of the operating systems to see how they utilize and manage advanced hardware technologies for newly emerging applications.

Topics covered overlap with those in the undergraduate operating systems course. However, it is expected that students understand each topic in more detail and at a higher standard.

In the first few weeks, basic concepts of OSes will be reviewed. During this period, students will decide the topics for their reports. In the next few weeks, advanced topics (such as virtual machines or distributed systems) and case studies will be covered.
授業スケジュール
/Class schedule
This schedule is tentative and will be adjusted according to the progress and interests of the attending students. Each class is a 50 minute period and two classes per week.

Class Topics Remarks
1 Course Introduction
Linux Overview Textbook: Sections 10.1 to 10.2
2-3 Processes, Threads and Scheduling Textbook: Section 10.3
4 Memory Management Textbook: Section 10.4
5 Input/Output Textbook: Section 10.5
6 File System Textbook: Section 10.6
7 Security Textbook: Section 10.7
8-9 Virtualization and the Cloud Textbook: Chapter 7
10 OperatingSystem Design Textbook: Chapter 12
11-13 Advanced Topics Selected Papers/Articles
14 Project Presentations

教科書
/Textbook(s)
Modern Operating Systems, Global Edition, 4/E , by Andrew S. Tanenbaum, ISBN 10: 1292061421, ISBN 13: 9781292061429, Prentice Hall. This is a REQUIRED textbook.

Academic journal (e.g. IEEE Transactions on Computers) and coference (e.g. ASPLOS) papers and articles from technical magazines (e.g. IEEE Micro) will also be used as the reading materials.
成績評価の方法・基準
/Grading method/criteria
The final course grade will be a combination of written exam(s) (40%), term paper (or project) (40%) and class participation (20%). Letter grades will follow the University Standard (A >= 80, B >= 65, C >= 50).
履修上の留意点
/Note for course registration
- B or better grades for the Computer Architecture and Operating Systems courses in undergraduate program (or equivalent).

- C programming proficiency.

- Understanding and familiarity to *nix concepts and operations.
参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
The instructor has  more than five years of industrial experiences as an LSI engineer and Computer Architect at Digital Equipment Corporation, ASTEM RI/Kyoto and HAL Computer Systems.

The information on this page is subject to change.
For the up to date information, please refer to
the course web page:

http://web-ext.u-aizu.ac.jp/~hitoshi/COURSES/AOS/

and course notice board:



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開講学期
/Semester
2019年度/Academic Year  4学期 /Fourth Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Yukihide Kohira
担当教員名
/Instructor
Yukihide Kohira, Hiroshi Saito
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/15
授業の概要
/Course outline
Due to the advanced of the deep sub-micron technology in VLSIs, many functions can be implemented on a chip (integrated circuit). More than ten millions or hundred millions of transistors are integrated on the chip. To implement the chip, it is impossible to design in manual. Recently, the most of VLSIs is designed using electronic design automation (EDA) tools. For example, once designer specifies the model of an application using a hardware description language (HDL) with a set of design constraints which consider design requirements, the EDA tools automatically synthesize a design from the model which satisfies the design requirements. Therefore, it is indispensable for designers to learn the EDA tools.
授業の目的と到達目標
/Objectives and attainment
goals
In this course, students learn the standard design flow in digital VLSIs from a structural model of an application specified in Verilog HDL to the layout design. However, it is difficult to design by the knowledge for the design techniques only. Therefore, in this course, students get the skill through an exercise. In the exercise, students design a VLSI circuit based on the standard design flow with the EDA tools.
授業スケジュール
/Class schedule
1. Introduction
2. Explanation for the exercise and Tutorial for EDA tools (1)
3. Verilog HDL
4. Tutorial for EDA tools (2)
5. Logic synthesis (1)
6. Logic synthesis (2)
7. Layout synthesis (1)
8. Exercise
9. Layout synthesis (2)
10. Exercise
11. Verification, testing, and power optimization
12. Exercise
13. Presentation
14. Presentation

In the exercise, students create a model for an application such as a signal processing algorithm using Verilog HDL. Then, students synthesize a logic design and a layout design from the Verilog HDL model using Cadence tools. In addition, students verify the timing requirements and the functional requirements for the logic design and the layout design. Finally, students evaluate the performance and area of the designed circuit.
教科書
/Textbook(s)
Not assigned
成績評価の方法・基準
/Grading method/criteria
Presentation (50%)
Exercise (36%)
Attitude in classes (14%)
履修上の留意点
/Note for course registration
Taking with SYA08 System-level Design for Digital VLSIs, students can study the standard design flow used in the industry from the functional model of an application by SystemC to the layout design before the chip fabrication.


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開講学期
/Semester
2019年度/Academic Year  1学期 /First Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Hitoshi Oi
担当教員名
/Instructor
Hitoshi Oi
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/13
授業の概要
/Course outline
This is a project-oriented course to learn and experiments in design and implementation techniques of modern computer systems
(Formerly offered as "Advanced Computer
Architecture" by 2011).  
Due to the nature of being project-oriented and fast pace of quarter system, this course is not recommended for the first time (fresh) graduate students unless (a) he/she has discussed with the instructor on the project topic, or (b) he/she has concrete topic for the project topic.
授業の目的と到達目標
/Objectives and attainment
goals
This is a project-oriented course to learn and experiments in design and implementation techniques of modern computer systems.

Students are requsted to discuss with the instructor on his/her project topics prior to the registration.  The student reports in the past years are available upon request.
授業スケジュール
/Class schedule
In the first few weeks, the related topics will be reviewed using reading materials such as journal/conference papers and magazine articles. Possible topics and tools that can be used for the projects will be introduced during this period. For the rest of the quarter, in addition to the literature study, students will report the progress of their project. Some tools can be used on the workstation provided by the school, but some others will require root access (privileged). Since this is a graduate course, you should have access to the computer in your lab for such tools. The instructor will assist student who have difficulties in using such tools.


教科書
/Textbook(s)
Selected journal and conference papers and magazine articles will be used. No textbook required. However, the following book is recommended as a reference:
COMPUTER ARCHITECTURE, A Quantitative Approach, Fourth Edition.
ISBN-13: 978-0-12-370490-0, ISBN-10: 0-12-370490-1, MORGAN KAUFFMAN .

成績評価の方法・基準
/Grading method/criteria
Grading Scheme and Policies
Project report (60%) + Presentation (20%) + Class Participation (20%) (tentative).


履修上の留意点
/Note for course registration
- Undergraduate Computer Architecture,
and Operating Systems (B or better).

- Proficiency in *nix and C language.


YOU NEED TO DISCUSS YOUR TOPIC WITH THE INSTRUCTOR.
参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
The contents of this page are subject to change.
For up to date information, please refer to the following pages
and contact the instructor.


http://www.u-aizu.ac.jp/~hitoshi/COURSES/SCA/
http://cnotice.oslab.biz/

The instructor has  more than five years of industrial experiences as an LSI engineer and Computer Architect at Digital Equipment Corporation, ASTEM RI/Kyoto and HAL Computer Systems.


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開講学期
/Semester
2019年度/Academic Year  4学期 /Fourth Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Yasuhiro Hisada
担当教員名
/Instructor
Yasuhiro Hisada
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/15
授業の概要
/Course outline
This introductory course in analog VLSI design covers the fundamentals of circuit theory, small signal modeling of bipolar and MOS transistors, bipolar and MOS analog circuit design, single-stage and multi-stage amplifier design, and operational amplifier design.
授業の目的と到達目標
/Objectives and attainment
goals
To gain a basic understanding of linear low frequency MOS and bipolar transistor analog circuit design.
授業スケジュール
/Class schedule
1. Basic circuit theory
2. Bipolar and MOS transistor operating regions
3. Bipolar and MOS small-signal models
4. Biasing the bipolar and MOS transistor
5. Single-stage amplifier design and analysis
6. Multi-stage amplifier design and analysis
7. Differential amplifier design and analysis
8. Operational amplifier design and analysis
教科書
/Textbook(s)
・"Analysis and Design of Analog Integrated Circuits", Paul R. Gray and Robert G. Meyer, Third edition, John Wiley Publishers.
・"Applied Electronic Devices and Analog ICs", J. Michael McMenamin, Delmar Publishers.
成績評価の方法・基準
/Grading method/criteria
Report(100%)
履修上の留意点
/Note for course registration
It is desirable that the student have basic understanding of semiconductor devices, VLSI design, and electronics.
参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
Many reference materials related to a particular lecture topic will be distributed during class.


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開講学期
/Semester
2019年度/Academic Year  4学期 /Fourth Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Maxim V. Ryzhii
担当教員名
/Instructor
Maxim V. Ryzhii
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/28
授業の概要
/Course outline
The course considers theory and physics of operation of classical and heterostructure quantum
semiconductor  devices for modern computer and communication systems.
The course consists of lectures and discussion seminars.
The course work report should be prepared at the end of the course (about 4 pages).
授業の目的と到達目標
/Objectives and attainment
goals
In-depth understanding of physics and principles of operation of advanced semiconductor
devices as elements for modern and future computer and communication systems.
授業スケジュール
/Class schedule
- Electronic structure of semiconductor materials
- Transport of carriers and optoelectronic properties
- Semiconductor heterostructures and heterostructure devices
- Optoelectronic devices
- Quantum electronics devices
- Tunneling semiconductor devices
- Basic semiconductor technology
教科書
/Textbook(s)
1. Kwok K.Ng "Complete Guide to Semiconductor Devices"
2. John G. Webster (editor) "Wiley Encyclopedia of Electrical and Electronics Engineering" vol. 8
成績評価の方法・基準
/Grading method/criteria
Grading is based on the evaluation of weekly homework assignment reports (30%) and course report (70%).
履修上の留意点
/Note for course registration
Requirements:
- Semiconductor Devices
- Quantum Mechanics
参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
1. Kwok K.Ng "Complete Guide to Semiconductor Devices"
2. John G. Webster (editor) "Wiley Encyclopedia of Electrical and Electronics Engineering" vol. 8


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開講学期
/Semester
2019年度/Academic Year  前期集中 /1st Semester Intensi
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Hiroshi Saito
担当教員名
/Instructor
Hiroshi Saito, TAKEI, Masahiko (Maxell), HORIKOSHI, Kenichi
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/02/28
授業の概要
/Course outline
Embedded systems are included in recent many equipments. These embedded systems support intelligent control system, preserving safeness, interaction between man and machine, and high performance. In this course, students study the basic theory and the implementation technique required to develop embedded systems.
授業の目的と到達目標
/Objectives and attainment
goals
In this course, students study the basic theory and the implementation technique required to develop embedded systems.
授業スケジュール
/Class schedule
The first part 11 - 12 periods (specially appointed professors from outside)

・Analysis of requirements specification
・Overview of real-time OS
・Programming techniques of real-time systems
・Event-driven programming
・Project management and quality management

The second part 2 - 3 periods (Prof. Saito)
・Overview of embedded system designs
・Field programmable gate array
・Recent topics for embedded system designs
教科書
/Textbook(s)
Not assigned
成績評価の方法・基準
/Grading method/criteria
Two reports:
One from the first part - 80%
Another from the second part - 20%
履修上の留意点
/Note for course registration
Because of the availability of embedded system boards, the number of registered students will be restricted to 18. Note that this course is provided in Japanese.
参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
Work experience (Horikoshi, Takei): Engaged in product planning and development of embedded OS and software during working at Renesas. Based on this experience, we will teach the basics of embedded software.

Japanese reference
組み込みシステムおよび形式記述・検証に関わる資料
参考図書として下記を推奨いたします。
『図解μITRONによる組込みシステム入門』 価格2,800円(税別) 森北出版社


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開講学期
/Semester
2019年度/Academic Year  前期集中 /1st Semester Intensi
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Hiroshi Saito
担当教員名
/Instructor
Hiroshi Saito
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/03/06
授業の概要
/Course outline
In embedded systems where CPU performance and memory capacity are restricted, a small Operating System with a real-time kernel is used. In this course, students learn realistic methods of software development using a real-time kernel through experiments. In the first half of the exercises, H8 microcomputer is used. In the latter half, software development is carried out using Field Programmable Gate Array (FPGA).
授業の目的と到達目標
/Objectives and attainment
goals
Students learn realistic methods of software development using a real-time kernel through experiments. In addition, students learn software development using FPGA).
授業スケジュール
/Class schedule
The followings are provided by using 14 periods.

1.Development of the embedded application development environment based on C language
2.Real-time operating system
3.Task generation and activation
4.Cycle wakeup
5.Task scheduling
6.Message box
7.Event flag
8.Interruption
9.Semaphore
10.Technique of real-time programming
11.Implementation of Nios II (CPU core) system on FPGAs
12.Development of embedded applications on Nios II
教科書
/Textbook(s)
Not assigned
成績評価の方法・基準
/Grading method/criteria
Exercise 100%
履修上の留意点
/Note for course registration
1. Please study about the basic knowledge of FPGAs
2. Lecture notes will be provided during classes
3. Submission of the exercise will be announced in the last classes
4. The time per period is based on the general time slot. However, according to the exercise, it will be arranged.

Because of the availability of embedded system boards, the number of registered students will be restricted to 10. Note that this course is provided in Japanese.

参考(授業ホームページ、図書など)
/Reference (course
website, literature, etc.)
Work experience (Yoshida, Suzuki, Kakizaki): We are working for
Fukushima Technology Centre, a public research institute in Fukushima
Prefecture, and have engaged in research development and technical support related to embedded systems, robots, AI / IoT.  Based on this experience, we teach the basics of embedded software engineering.

Japanese reference
1. μITRON4.0仕様 Ver.4.02.00 (社) トロン協会 ITRON仕様検討グループ
  坂村健 監修/高田広章 編
2. その他、配布テキスト


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開講学期
/Semester
2019年度/Academic Year  1学期 /First Quarter
対象学年
/Course for;
1st year , 2nd year
単位数
/Credits
2.0
責任者
/Coordinator
Hiroshi Saito
担当教員名
/Instructor
Hiroshi Saito
推奨トラック
/Recommended track
履修規程上の先修条件
/Prerequisites

更新日/Last updated on 2019/01/29
授業の概要
/Course outline
Due to the advanced of the deep sub-micron technology in VLSIs, many functions can be implemented on a chip (integrated circuit). More than ten millions or hundred millions of transistors are integrated on the chip. To implement the chip, it is impossible to design in manual. Recently, the most of VLSIs is designed using electronic design automation (EDA) tools. For example, once designer specifies the model of an application using a programming language such as C++ with a set of design constraints which consider design requirements, the EDA tools automatically synthesize a design from the model which satisfies the design requirements. Therefore, it is indispensable for designers to learn the EDA tools.
授業の目的と到達目標
/Objectives and attainment
goals
In this course, students learn the standard design flow in digital VLSIs from a functional model of an application specified in SystemC to the Register Transfer Level (RTL) design of the application. However, it is difficult to design by the knowledge for the design techniques only. Therefore, in this course, students get the skill through an exercise. In the exercise, students design a VLSI circuit based on the standard design flow with the EDA tools.
授業スケジュール
/Class schedule
1. Introduction
2. Explanation for the exercise
3. Languages for Transaction-level Design and Verification
4. SystemC
5. Overview of Transaction Level Modeling Driven Design and Verification Methodology
6. Tutorial for an HLS tool
7. High-level Synthesis (HLS) Fundamentals
8. Exercise
9. Algorithms used in HLS
10. Exercise
11. Verification Fundamentals
12. Exercise
13. Presentation
14. Presentation

In the exercise, students creates a functional model of an application such as a signal processing algorithm using SystemC. Then, students synthesize the RTL model using a Cadence HLS tool. In addition, students verify the functional requirements using a Cadence logic simulator. Finally, students evaluate the performance and area of the designed circuit.
教科書
/Textbook(s)
Not assigned
成績評価の方法・基準
/Grading method/criteria
Presentation (55%) and exercise (45%)
履修上の留意点
/Note for course registration
Taking with Electronic Design Automation for Digital VLSIs, students can study the standard design flow used in the industry from the functional model of an application by SystemC to the layout design before the chip fabrication.


Responsibility for the wording of this article lies with Student Affairs Division (Academic Affairs Section).

E-mail Address: sad-aas@u-aizu.ac.jp