AY 2023 Graduate School Course Catalog AY 2023 Graduate School Course Catalog AY 2023 Graduate School Course Catalog
| 2024/01/30 |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 1学期 ／First Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
OI Hitoshi |
| 担当教員名 ／Instructor |
OI Hitoshi |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
－ |
| 更新日／Last updated on | 2023/02/03 |
|---|---|
| 授業の概要 ／Course outline |
This is a project-oriented course to learn and experiments in design and implementation techniques of modern computer systems (Formerly offered as "Advanced Computer Architecture" by 2011). Due to the nature of being project-oriented and fast pace of quarter system, this course is not recommended for the first time (fresh) graduate students unless (a) he/she has discussed with the instructor on the project topic, or (b) he/she has concrete topic for the project topic. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
This is a project-oriented course to learn and experiments in design and implementation techniques of modern computer systems. Students are requsted to discuss with the instructor on his/her project topics prior to the registration. The student reports in the past years are available upon request. |
| 授業スケジュール ／Class schedule |
In the first few weeks, the related topics will be reviewed using reading materials such as journal/conference papers and magazine articles. Possible topics and tools that can be used for the projects will be introduced during this period. For the rest of the quarter, in addition to the literature study, students will report the progress of their project. Some tools can be used on the workstation provided by the school, but some others will require root access (privileged). Since this is a graduate course, you should have access to the computer in your lab for such tools. The instructor will assist student who have difficulties in using such tools. |
| 教科書 ／Textbook(s) |
Selected journal and conference papers and magazine articles will be used. No textbook required. However, the following book is recommended as a reference: COMPUTER ARCHITECTURE, A Quantitative Approach, Sixth Edition. ISBN-13: ISBN: 9780128119051, MORGAN KAUFFMAN . |
| 成績評価の方法・基準 ／Grading method/criteria |
Grading Scheme and Policies Project report (60%) + Presentation (20%) + Class Participation (20%) (tentative). |
| 履修上の留意点 ／Note for course registration |
- Undergraduate Computer Architecture, and Operating Systems (B or better). - Proficiency in *nix and C language. YOU NEED TO DISCUSS YOUR TOPIC WITH THE INSTRUCTOR. |
| 参考(授業ホームページ、図書など) ／Reference (course website, literature, etc.) |
The contents of this page are subject to change. For up to date information, please refer to the following pages and contact the instructor. http://www.u-aizu.ac.jp/~hitoshi/COURSES/SCA/ http://cnotice.oslab.biz/ The instructor has more than five years of industrial experiences as an LSI engineer and Computer Architect at Digital Equipment Corporation, ASTEM RI/Kyoto and HAL Computer Systems. |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 2学期 ／Second Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
HISADA Yasuhiro |
| 担当教員名 ／Instructor |
HISADA Yasuhiro |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
－ |
| 更新日／Last updated on | 2023/02/02 |
|---|---|
| 授業の概要 ／Course outline |
This introductory course in analog VLSI design covers the fundamentals of circuit theory, small signal modeling of bipolar and MOS transistors, bipolar and MOS analog circuit design, single-stage and multi-stage amplifier design, and operational amplifier design. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
To gain a basic understanding of linear low frequency MOS and bipolar transistor analog circuit design. |
| 授業スケジュール ／Class schedule |
1. Basic circuit theory 2. Bipolar and MOS transistor operating regions 3. Bipolar and MOS small-signal models 4. Biasing the bipolar and MOS transistor 5. Single-stage amplifier design and analysis 6. Multi-stage amplifier design and analysis 7. Differential amplifier design and analysis 8. Operational amplifier design and analysis |
| 教科書 ／Textbook(s) |
・"Analysis and Design of Analog Integrated Circuits", Paul R. Gray and Robert G. Meyer, Third edition, John Wiley Publishers. ・"Applied Electronic Devices and Analog ICs", J. Michael McMenamin, Delmar Publishers. |
| 成績評価の方法・基準 ／Grading method/criteria |
Report(100%) |
| 履修上の留意点 ／Note for course registration |
It is desirable that the student have basic understanding of semiconductor devices, VLSI design, and electronics. |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 4学期 ／Fourth Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
RYZHII Maxim V. |
| 担当教員名 ／Instructor |
RYZHII Maxim V. |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
- Semiconductor Devices - Quantum Mechanics - Introduction to Optoelectronics |
| 更新日／Last updated on | 2023/02/02 |
|---|---|
| 授業の概要 ／Course outline |
The course considers the theory and physics of operation of classical and heterostructure quantum semiconductor devices for modern computer and communication systems. The course consists of lectures and seminars. The coursework report should be prepared at the end of the course (essay on a particular topic, about 4 pages). |
| 授業の目的と到達目標 ／Objectives and attainment goals |
In-depth understanding of physics and principles of operation of advanced semiconductor devices as elements for modern and future computer and communication systems. |
| 授業スケジュール ／Class schedule |
1-2. Band Theory of Solids, Semiconductors, Optical properties, p-n junction 3-4. Heterojunctions: basics, Growth, Applications, Models and equations 5-6. Bipolar Junction Transistor (BJT) and Heterojunction Bipolar Transistor (HBT) 7-8. Photodetectors, Light-Emitting Diodes, Laser Diodes 9-10. Quantum Dot Infrared Photodetector (QDIP), Quantum Well Infrared Photodetector (QWIP) 11-12. Tunneling Devices: Tunneling Diode and Resonant-Tunneling Diode. Heterojunction FET (HFET) and High Electron Mobility Transistor (HEMT) 13. Graphene and Graphene-based devices. Carbon nanotubes 14. Fabrication Technology: Implantation, Etching, Oxidation, Deposition, Lithography |
| 教科書 ／Textbook(s) |
1. Kwok K.Ng "Complete Guide to Semiconductor Devices" Additional: 2. John G. Webster (editor) "Wiley Encyclopedia of Electrical and Electronics Engineering" vol. 8 |
| 成績評価の方法・基準 ／Grading method/criteria |
Grading is based on the evaluation of homework assignment reports (20%) and course report (80%). |
| 履修上の留意点 ／Note for course registration |
The course instructor has 30 year working experiences in computer modeling and theory of novel nanoelectronic devices. |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 1学期 ／First Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
SAITO Hiroshi |
| 担当教員名 ／Instructor |
SAITO Hiroshi |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
－ |
| 更新日／Last updated on | 2023/01/19 |
|---|---|
| 授業の概要 ／Course outline |
Due to the advanced of the deep sub-micron technology in VLSIs, many functions can be implemented on a chip (integrated circuit). More than ten millions or hundred millions of transistors are integrated on the chip. To implement the chip, it is impossible to design in manual. Recently, the most of VLSIs is designed using electronic design automation (EDA) tools. For example, once designer specifies the model of an application using a programming language such as C++ with a set of design constraints which consider design requirements, the EDA tools automatically synthesize a design from the model which satisfies the design requirements. Therefore, it is indispensable for designers to learn the EDA tools. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
In this course, students learn the standard design flow in digital VLSIs from a functional model of an application specified in SystemC to the Register Transfer Level (RTL) design of the application. However, it is difficult to design by the knowledge for the design techniques only. Therefore, in this course, students get the skill through an exercise. In the exercise, students design a VLSI circuit based on the standard design flow with the EDA tools. |
| 授業スケジュール ／Class schedule |
1. Introduction 2. Explanation for the exercise 3. SystemC 4. Exercise 5. Tutorial for Stratus 6. Exercise 7. High-level Synthesis (HLS) Fundamentals 8. Exercise 9. Design space exploration using Stratus 10. Exercise 11. Algorithms used in HLS 12. Exercise 13. Presentation 14. Presentation In the exercise, students creates a functional model of an application such as a signal processing algorithm using SystemC. Then, students synthesize the RTL model using a Cadence HLS tool. In addition, students verify the functional requirements using a Cadence logic simulator. Finally, students evaluate the performance and area of the designed circuit. |
| 教科書 ／Textbook(s) |
Not assigned |
| 成績評価の方法・基準 ／Grading method/criteria |
Presentation (55%) and exercise (45%) |
| 履修上の留意点 ／Note for course registration |
Taking with "Electronic Design Automation for Digital VLSIs", students can study the standard design flow used in the industry from the functional model of an application by SystemC to the layout design before the chip fabrication. Hybrid style (online and onsite) will adopted by the situation of COVID-19. |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 前期集中 ／1st Semester Intensi |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
SAITO Hiroshi |
| 担当教員名 ／Instructor |
SAITO Hiroshi, TAKEI Masahiko (Maxell), HORIKOSHI Kenichi |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
－ |
| 更新日／Last updated on | 2023/02/07 |
|---|---|
| 授業の概要 ／Course outline |
From molecular scale to human body, computer simulation of living matter has become practical due to the development of computer performance, computation scheme and experimental measurement. This kind of simulation has widely applied to medical fields through drug discovery, surgical operations planning and etc. In this course, we will learn those basic theories and current status: molecular simulation using molecular dynamics and continuum mechanics simulation including structure analysis and fluid dynamics. In addition, we will experience them through exercises using PCs. Software used in exercises will be prepared as teaching materials. Anyone can attend the course without prerequisites. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
We will learn basic theory and mathematical algorithms to solve basic governing equations in simulation of living matters from molecular scale to whole body as well as their wide applications in real world, especially in medical field. More specifically, 1) Molecular scale: basic theory and mathematical algorithm of molecular dynamics simulation and its wide applications, 2) Organ scale: basic theory and mathematical algorithm of structure analysis and non linear structure analysis for hard tissue simulation of human body and its practical applications, 3) Fluid dynamics simulation in human body: basic theory and mathematical algorithm of fluid dynamics simulation in the human body and its practical medical applications. In 1) and 2), trough exercises using PC, you will execute simulation by yourself and learn how to simulate problems and how to visualize those results. |
| 授業スケジュール ／Class schedule |
1. Introduction of this course by Ryutaro Himeno （1 lecture） 2. Molecular Simulation of Living Matter by Hiroo Kenzaki (2 lectures) ・ Basic Theory ・ Application ・ Exercise 3. Basic Theory of Hard Tissue Simulation and Computational Fluid Dynamics of Living Matter by Ryutaro Himeno (2 lectures) ・ Basic Theory of Hard Tissue Simulation ・ Basic Theory of Computational Fluid Dynamics 4. Computational Fluid Dynamics of Living Matter (2 lectures) ・ Medical Application: Shigeho Noda ・ Exercise: Shigeho Noda Total 7 |
| 教科書 ／Textbook(s) |
No textbook but teaching materials will be provided in the course |
| 成績評価の方法・基準 ／Grading method/criteria |
Quizzes and Exercises at each class: 100% |
| 履修上の留意点 ／Note for course registration |
Bring your own PC for the exercise. OS should be Windows or Linux because of executing application software used in exercise. If you can not prepare PC with Windows, or Linux, please contact the instructors. |
| 参考(授業ホームページ、図書など) ／Reference (course website, literature, etc.) |
Work experience (Himeno): I have practical work experiences about 15 years at NISSAN Motor Co. for using Fluid simulation handled in biofluid simulation. Based on this experience, I teach the basics of fluid simulation. Simulation software for exercise of molecular simulation of living matter. Coarse-grained biomolecular simulation software CafeMol: http://www.cafemol.org/ Simulation software for exercise of Blood flow simulation of living matter. The system is based on VCAD System. http://vcad-hpsv.riken.jp/en/release_software/block/04.php |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 2学期 ／Second Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
BEN ABDALLAH Abderazek |
| 担当教員名 ／Instructor |
BEN ABDALLAH Abderazek, DANG Nam Khanh |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
－ |
| 更新日／Last updated on | 2023/01/16 |
|---|---|
| 授業の概要 ／Course outline |
This course covers brain-inspired (neuromorphic) neural networks that mimic the functional behavior and the organizational structure of the neocortex. We present spiking neurons and explore principles of computation and self-organization in biological and artificial neural networks. The course reviews functional plasticity models and emergent computational capabilities of neural networks, focusing on short-term and long-term synaptic plasticity to develop information-processing devices directly inspired by the working of neurons, synapses, and networks. This should enables the development of novel high-performance neuro-inspired computing platforms. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
After finishing this course, a student will: - Understand the characteristics of neuromorphic circuit elements. - Have a broad overview of the basic principles of neuromorphic computing and the difference with traditional computing paradigms; - Familiarize with state-of-the-art neuromorphic hardware systems, including some hands-on experience with such architectures - Understand learning algorithms for spiking neural networks and the pros and cons of using spiking architectures - Have some experience with neuromorphic algorithm design and complexity analysis and applications of neuromorphic architectures in event-driven sensors. |
| 授業スケジュール ／Class schedule |
1. Overview of past and present neurocomputing approaches 2. Neuron Models and Coding 3.Hardware Models of Spiking Neurons 4.Synaptic Dynamics 5.Synaptic Plasticity Mechanisms 6.Learning in Neuromorphic Systems 7.Emerging Memory Devices for Neuromorphic Systems 8.Communication Networks for Neuromorphic Systems 9.Fault-Tolerance in Neuromorphic Systems 10Fault-Recovery and Reliability in Neuromorphic Systems 11 Reconfigurable Neuromorphic Computing System 12.Neuromorphic AI Hardware 13.Synthesizing real-time neuromorphic cognitive systems: Real-world HW-SW Design 1 14.Synthesizing real-time neuromorphic cognitive systems: Real-world HW-SW Design 2 |
| 教科書 ／Textbook(s) |
Abderazek Ben Abdallah, Khanh N. Dang (Authors), ''Neuromorphic Computing Principles and Organization,'' Publisher: Springer; 1st ed. 2022 edition (March 12, 2022), ISBN-10 : 3030925242, ISBN-13 : 978-3030925246 |
| 成績評価の方法・基準 ／Grading method/criteria |
- Presentations and class activities: 25 % - Home work: 25 % - Final Exam: 50 % |
| 履修上の留意点 ／Note for course registration |
Needed knowledge on: Neural Networks |
| 参考(授業ホームページ、図書など) ／Reference (course website, literature, etc.) |
Course web page and reference materials will be given during the first lecture |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 1学期 ／First Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
SUZUKI Daisuke |
| 担当教員名 ／Instructor |
SUZUKI Daisuke, KOHIRA Yukihide |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
－ |
| 更新日／Last updated on | 2023/01/27 |
|---|---|
| 授業の概要 ／Course outline |
Because CMOS technologies are widely used in modern electronics, we need advanced knowledge of scaled CMOS devices. Moreover, recently the demand for mixed-signal LSIs, including analog and RF (Radio Frequency) circuits, is very rapidly increasing, especially for consumer electronics, communication equipments, and hardware accelerators for artificial intelligence (AI) such as deep learning. In addition, knowledge of scaled CMOS devices is also important for designing emerging memories such as MRAMs (Magnetic RAMs) and ReRAMs (Resistive RAMs), and so on. This course concerns theoretical and practical aspects of CMOS devices and modeling. First, fundamentals of semiconductor devices, which are undergraduate level, will be reviewed and distributed-constant circuit models will be also provided. Then, in-depth modeling of MOS transistors will be introduced using the textbook (Chapters 2 to 5). This helps you design VLSIs using the deep sub-micron CMOS in the near future. Finally, design examples of mixed-signal LSIs and emerging memory LSIs will be overviewed. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
At the end of the course the student should be able to: ・Explain the basic concepts of the semiconductor devices. ・Design CMOS VLSI chips. ・Understand MOS transistor models used for design of mixed-signal LSIs ・Forecast the future direction of VLSI technologies. |
| 授業スケジュール ／Class schedule |
1. Reviewing fundamentals of semiconductor devices (undergraduate level) (1) 2. Reviewing fundamentals of semiconductor devices (undergraduate level) (2) 3. Distributed-constant circuit models and thermal noise basics 4. Basic Device Physics (Chapter 2): MOS capacitors, High-field effects (1) 5. Basic Device Physics (Chapter 2): MOS capacitors, High-field effects (2) 6. MOSFET Devices (Chapter 3) (1) 7. MOSFET Devices (Chapter 3) (2) 8. CMOS Device Design (Chapter 4): Scaling, Variations of threshold voltage (1) 9. CMOS Device Design (Chapter 4): Scaling, Variations of threshold voltage (2) 10. CMOS Performance Factors (Chapter 5): Basic circuits, Parasitic elements (1) 11. CMOS Performance Factors (Chapter 5): Basic circuits, Parasitic elements (2) 12. CMOS Performance Factors (Chapter 5): Sensitivity of delay to device parameters, Advanced CMOS Devices (1) 13. CMOS Performance Factors (Chapter 5): Sensitivity of delay to device parameters, Advanced CMOS Devices (2) 14. Examples of mixed-signal LSIs and Emerging Memory LSIs |
| 教科書 ／Textbook(s) |
Y. Taur and T. H. Ning, "Fundamentals of Modern VLSI Devices (3rd Edition)", Cambridge University Press, ISBN 978-1108480024, (2021). |
| 成績評価の方法・基準 ／Grading method/criteria |
1. Report: 100% 2. At the end of the course, topics are given to students. They are required to survey and study about the topics by themselves. |
| 履修上の留意点 ／Note for course registration |
The following or related under graduate courses are recommended to take: ・Semiconductor Devices （半導体デバイス） ・VLSI Design （VLSI設計技術） ・Electronics （電子回路） |
| 参考(授業ホームページ、図書など) ／Reference (course website, literature, etc.) |
1. T. Tsividis, “Operation and Modeling of the MOS Transistors,” 2nd Edition, ISBN 0-07-065523-5, (1999). 2. T. Tsukahara, “Design of CMOS RF Circuits,” Maruzen, ISBN: 978-4-621-08203-4, (2009) (in Japanese). |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 4学期 ／Fourth Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
KOHIRA Yukihide |
| 担当教員名 ／Instructor |
KOHIRA Yukihide, SAITO Hiroshi |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
－ |
| 更新日／Last updated on | 2023/01/25 |
|---|---|
| 授業の概要 ／Course outline |
Due to the advanced of the deep sub-micron technology in VLSIs, many functions can be implemented on a chip (integrated circuit). More than ten millions or hundred millions of transistors are integrated on the chip. To implement the chip, it is impossible to design in manual. Recently, the most of VLSIs is designed using electronic design automation (EDA) tools. For example, once designer specifies the model of an application using a hardware description language (HDL) with a set of design constraints which consider design requirements, the EDA tools automatically synthesize a design from the model which satisfies the design requirements. Therefore, it is indispensable for designers to learn the EDA tools. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
In this course, students learn the standard design flow in digital VLSIs from a structural model of an application specified in Verilog HDL to the layout design. However, it is difficult to design by the knowledge for the design techniques only. Therefore, in this course, students get the skill through an exercise. In the exercise, students design a VLSI circuit based on the standard design flow with the EDA tools. |
| 授業スケジュール ／Class schedule |
1. Introduction 2. Explanation for the exercise and Tutorial for EDA tools (1) 3. Verilog HDL 4. Tutorial for EDA tools (2) 5. Logic synthesis (1) 6. Logic synthesis (2) 7. Layout synthesis (1) 8. Exercise 9. Layout synthesis (2) 10. Exercise 11. Verification, testing, and power optimization 12. Exercise 13. Presentation 14. Presentation In the exercise, students create a model for an application such as a signal processing algorithm using Verilog HDL. Then, students synthesize a logic design and a layout design from the Verilog HDL model using Cadence tools. In addition, students verify the timing requirements and the functional requirements for the logic design and the layout design. Finally, students evaluate the performance and area of the designed circuit. |
| 教科書 ／Textbook(s) |
Not assigned |
| 成績評価の方法・基準 ／Grading method/criteria |
Presentation (50%) Exercise (36%) Attitude in classes (14%) |
| 履修上の留意点 ／Note for course registration |
Taking with SYA08 System-level Design for Digital VLSIs, students can study the standard design flow used in the industry from the functional model of an application by SystemC to the layout design before the chip fabrication. It is recommended to take both SYA08 System-level Design for Digital VLSIs and this course. |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 4学期 ／Fourth Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
TOMIOKA Yoichi |
| 担当教員名 ／Instructor |
KITAMICHI Junji, TOMIOKA Yoichi |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
－ |
| 更新日／Last updated on | 2023/01/12 |
|---|---|
| 授業の概要 ／Course outline |
Embedded Real-time systems are systems that require timely responses to facilitate their operation or they risk performance degradation or even total system failure. This course introduces the various building blocks and underlying scientific and engineering principles behind embedded real-time systems. It covers the integrated hardware and software aspects of embedded processor architectures, along with advanced topics such as real-time, resource and memory management, and RTOS scheduling. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
1. Learn advanced issues about embedded real-time system design and scheduling. 2. Learn how to program with real-time embedded architecture. 3. Learn and apply real-time principles that are used to drive critical embedded systems. |
| 授業スケジュール ／Class schedule |
1. Introduction to Embedded Real-Time System 2. Real-Time Task Scheduling I 3. Real-Time Task Scheduling II 4. Resource Access Control 5. Multiprocessor Scheduling 6. Real-Time OS (RTOS) I 7. Real-Time OS (RTOS) II 8. Real-Time OS (RTOS) III 9-12. Embedded Real-Time System Programming (Exercise) 13. Deep Learning Algorithm for Real-Time Embedded Systems 14. Deep Learning Accelerators for Real-Time Embedded Systems |
| 教科書 ／Textbook(s) |
Real-Time Embedded Components and Systems, By Sam Siewert Hardcover: 384 pages Publisher: Charles River Media; 1 edition (June 27, 2006) Language: English ISBN-10: 1584504684 ISBN-13: 978-1584504689 |
| 成績評価の方法・基準 ／Grading method/criteria |
Report: 100 % |
| 履修上の留意点 ／Note for course registration |
Knowledge about Embedded Systems, Computer Architecture/organization. |
| 参考(授業ホームページ、図書など) ／Reference (course website, literature, etc.) |
Buttazzo, Giorgio C: Hard Real-Time Computing Systems, Springer. |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 2学期 ／Second Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
KITAMICHI Junji |
| 担当教員名 ／Instructor |
KITAMICHI Junji, TOMIOKA Yoichi |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
－ |
| 更新日／Last updated on | 2023/01/27 |
|---|---|
| 授業の概要 ／Course outline |
In this course, many topics, Pipelining with out-order execution, memory hierachy, instruction/data level parallelism, and so on, which are adopted in the advanced computer architecture, such as high-performance general purpose computers, GPGPUs, embedded processors, are explained. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
In this course, our students understand the computer architecture which keeps evolving and obtain the base for more advanced development of it. They can use the knowledge obtained in this lecture to research at their Lab. |
| 授業スケジュール ／Class schedule |
1: Introduction 2: Basic Concepts of Processor: In-order pipeline 3: Basic Concepts of Processor: Interrupt 4: Basic Concepts of Processor: Memory mapped I/O 5: Fundamentals of Quantitative Design and Analysis 6: Memory Hierarchy Design 7: Instruction-Level Parallelism: Basic 8: Instruction-Level Parallelism: Out of Order Pipeline 9: Data-Level Parallelism in Vector and SIMD Architectures 10: Data-Level Parallelism in GPU Architectures 11: Thread-Level Parallelism: Multi-core Processor 12: Thread-Level Parallelism: Cache system for Multi-core Processor 13-14 : Other topics |
| 教科書 ／Textbook(s) |
2-4: Computer Organization and Design MIPS Edition 5-14: Computer Architecture, 6th Edition: A Quantitative Approach |
| 成績評価の方法・基準 ／Grading method/criteria |
Mini Reports (40%) and exam. (60%) |
| 履修上の留意点 ／Note for course registration |
None For undergraduate students, they should get the credits of Computer Architecture and Embedded Systems. |
| 参考(授業ホームページ、図書など) ／Reference (course website, literature, etc.) |
CQ出版社 マイクロプロセッサ・アーキテクチャ入門 中森 章 著 |
| Open Competency Codes Table Back |
| 開講学期 ／Semester |
2023年度／Academic Year 2学期 ／Second Quarter |
|---|---|
| 対象学年 ／Course for; |
1st year , 2nd year |
| 単位数 ／Credits |
2.0 |
| 責任者 ／Coordinator |
OI Hitoshi |
| 担当教員名 ／Instructor |
OI Hitoshi, MATSUMOTO Koji (NAOJ) |
| 推奨トラック ／Recommended track |
－ |
| 先修科目 ／Essential courses |
- B or better grades for the Computer Architecture and Operating Systems courses in undergraduate program (or equivalent). - C programming proficiency. - Understanding and familiarity to *nix concepts and operations. |
| 更新日／Last updated on | 2023/02/03 |
|---|---|
| 授業の概要 ／Course outline |
This course has a set of clearly and explicitly defined set of prerequisites. If you cannot provide official documents that support your meeting the prerequisites (most typically, undergrad transcripts), PLEASE DO NOT REGISTER. Registration from such students will be declined. If you not have necessary technical/academic backgrounds, but still want to take this course, please take appropriate conversion courses first. Advanced Operating Systems is one of core courses in the graduate program at the University of Aizu, offered from the 3rd quarter of AY2012. |
| 授業の目的と到達目標 ／Objectives and attainment goals |
This is one of core courses in the graduate program in Computer Science and Engineering at the University of Aizu. The course covers from the basic design concepts of the modern operating systems to the case studies in the actual implementations of the operating systems to see how they utilize and manage advanced hardware technologies for newly emerging applications. Topics covered overlap with those in the undergraduate operating systems course. However, it is expected that students understand each topic in more detail and at a higher standard. In the first few weeks, basic concepts of OSes will be reviewed. During this period, students will decide the topics for their reports. In the next few weeks, advanced topics (such as virtual machines or distributed systems) and case studies will be covered. |
| 授業スケジュール ／Class schedule |
This schedule is tentative and will be adjusted according to the progress and interests of the attending students. Each class is a 50 minute period and two classes per week. Class Topics Remarks 1 Course Introduction Linux Overview Textbook: Sections 10.1 to 10.2 2-3 Processes, Threads and Scheduling Textbook: Section 10.3 4 Memory Management Textbook: Section 10.4 5 Input/Output Textbook: Section 10.5 6 File System Textbook: Section 10.6 7 Security Textbook: Section 10.7 8-9 Virtualization and the Cloud Textbook: Chapter 7 10 Operating System Design Textbook: Chapter 12 11-13 Advanced Topics Selected Papers/Articles 14 Project Presentations |
| 教科書 ／Textbook(s) |
Modern Operating Systems, Global Edition, 4/E* , by Andrew S. Tanenbaum, ISBN 10: 1292061421, ISBN 13: 9781292061429, Prentice Hall. This is a REQUIRED textbook. *May switch to the 5th edition (ISBN-13: 9780137618873) if it is available. Academic journal (e.g. IEEE Transactions on Computers) and conference (e.g. ASPLOS) papers and articles from technical magazines (e.g. IEEE Micro) will also be used as the reading materials. |
| 成績評価の方法・基準 ／Grading method/criteria |
The final course grade will be a combination of written exam(s) (40%), term paper (or project) (40%) and class participation (20%). Letter grades will follow the University Standard (A >= 80, B >= 65, C >= 50). |
| 履修上の留意点 ／Note for course registration |
PLEASE READ THIS PART CAREFULLY. If you cannot provide official documents that support your meeting the prerequisites (most typically, undergrad transcripts), PLEASE DO NOT REGISTER. - B or better grades for the Computer Architecture and Operating Systems courses in undergraduate program (or equivalent). For the undergraduate OS, it should cover the Chapters 1 to 6 of the Modern Operating Systems (or equivalent). - C programming proficiency. - Understanding and familiarity to *nix concepts and operations. |
| 参考(授業ホームページ、図書など) ／Reference (course website, literature, etc.) |
The instructor has more than five years of industrial experiences as an LSI engineer and Computer Architect at Digital Equipment Corporation, ASTEM RI/Kyoto and HAL Computer Systems. The information on this page is subject to change. For the up to date information, please refer to the course web page: http://www.u-aizu.ac.jp/~hitoshi/COURSES/AOS/ |