| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 1 | LI11 Intro. to Computer Networking [SR] [TGU][C7](M8,JING Lei) | - | - | LI11 Intro. to Computer Networking [SR] [TGU][C7](M8,JING Lei) | - |
| 2 | LI11 Intro. to Computer Networking [SR] [TGU][C7](M8,JING Lei) | - | LI14 CSE Exercise II [TGU] [ex][C7](std1,COHEN Michael) | LI11 Intro. to Computer Networking [SR] [TGU][C7](M8,JING Lei) | - |
| 3 | - | - | LI14 CSE Exercise II [TGU] [ex][C7](std1,COHEN Michael) | - | - |
| 4 | - | - | LI14 CSE Exercise II [TGU] [ex][C7](std1,COHEN Michael) | - | - |
| 5 | JP05 Advanced Japanese I [TGU][C7](S7,KUSAKARI Akemi) | FU04 Logic Circuit Design [SR] [TGU][C7](M5,M6,SAITO Hiroshi) | - | JP05 Advanced Japanese I [TGU][C7](S7,KUSAKARI Akemi) | FU04 Logic Circuit Design [SR] [TGU][C7](M5,M6,SAITO Hiroshi) |
| 6 | JP05 Advanced Japanese I [TGU][C7](S7,KUSAKARI Akemi) | FU04 Logic Circuit Design [SR] [TGU][C7](M5,M6,SAITO Hiroshi) | - | JP05 Advanced Japanese I [TGU][C7](S7,KUSAKARI Akemi) | FU04 Logic Circuit Design [SR] [TGU][C7](M5,M6,SAITO Hiroshi) |
| 7 | NS04 Semiconductor Devices [TGU][C7](M9,M10,RYZHII Maxim V.) | FU04 Logic Circuit Design [SR] [TGU] [ex][C7](hdw1,SAITO Hiroshi) | - | NS04 Semiconductor Devices [TGU][C7](M9,M10,RYZHII Maxim V.) | FU04 Logic Circuit Design [SR] [TGU] [ex][C7](hdw1,SAITO Hiroshi) |
| 8 | NS04 Semiconductor Devices [TGU][C7](M9,M10,RYZHII Maxim V.) | FU04 Logic Circuit Design [SR] [TGU] [ex][C7](hdw1,SAITO Hiroshi) | - | NS04 Semiconductor Devices [TGU][C7](M9,M10,RYZHII Maxim V.) | FU04 Logic Circuit Design [SR] [TGU] [ex][C7](hdw1,SAITO Hiroshi) |
| 9 | - | - | - | - | - |
| 10 | - | - | - | - | - |
| 11 | - | - | - | - | - |
| Mon | Tue | Wed | Thu | Fri | |
|---|---|---|---|---|---|
| 1 | - | FU08 Automata and Languages [SR] [TGU][C7](M6,M7,HAMADA Mohamed) | - | - | FU08 Automata and Languages [SR] [TGU][C7](M6,M7,HAMADA Mohamed) |
| 2 | - | FU08 Automata and Languages [SR] [TGU][C7](M6,M7,HAMADA Mohamed) | LI14 CSE Exercise II [TGU] [ex][C7](std1,COHEN Michael) | - | FU08 Automata and Languages [SR] [TGU][C7](M6,M7,HAMADA Mohamed) |
| 3 | MA06 Complex Analysis[C7](LTh,LI Xiang) | FU08 Automata and Languages [SR] [TGU] [ex][C7](M6,M7,HAMADA Mohamed) | LI14 CSE Exercise II [TGU] [ex][C7](std1,COHEN Michael) | MA06 Complex Analysis[C7](LTh,LI Xiang) | FU08 Automata and Languages [SR] [TGU] [ex][C7](M6,M7,HAMADA Mohamed) |
| 4 | MA06 Complex Analysis[C7](LTh,LI Xiang) | - | LI14 CSE Exercise II [TGU] [ex][C7](std1,COHEN Michael) | MA06 Complex Analysis[C7](LTh,LI Xiang) | - |
| 5 | FU06 Operating Systems [SR] [TGU][C7](LTh,LIU Yong) | LI10 Introduction to Multimedia Systems [SR] [TGU][C7](S2,VILLEGAS OROZCO Julian Alberto) | - | FU06 Operating Systems [SR] [TGU][C7](LTh,LIU Yong) | LI10 Introduction to Multimedia Systems [SR] [TGU][C7](S2,VILLEGAS OROZCO Julian Alberto) |
| 6 | FU06 Operating Systems [SR] [TGU][C7](LTh,LIU Yong) | LI10 Introduction to Multimedia Systems [SR] [TGU][C7](S2,VILLEGAS OROZCO Julian Alberto) | - | FU06 Operating Systems [SR] [TGU][C7](LTh,LIU Yong) | LI10 Introduction to Multimedia Systems [SR] [TGU][C7](S2,VILLEGAS OROZCO Julian Alberto) |
| 7 | FU06 Operating Systems [SR] [TGU] [ex][C7](hdw1,LIU Yong) | JP06 Advanced Japanese II [TGU][C7](S7,KUSAKARI Akemi) | - | FU06 Operating Systems [SR] [TGU] [ex][C7](hdw1,LIU Yong) | JP06 Advanced Japanese II [TGU][C7](S7,KUSAKARI Akemi) |
| 8 | FU06 Operating Systems [SR] [TGU] [ex][C7](hdw1,LIU Yong) | JP06 Advanced Japanese II [TGU][C7](S7,KUSAKARI Akemi) | - | FU06 Operating Systems [SR] [TGU] [ex][C7](hdw1,LIU Yong) | JP06 Advanced Japanese II [TGU][C7](S7,KUSAKARI Akemi) |
| 9 | - | - | - | - | - |
| 10 | - | - | - | - | - |
| 11 | - | - | - | - | - |
| intensive courses |
|
| [ex]=Exercise [Re-take]=Re-take class |
| LTh=Lecture Hall, M=Lecture Room, S=Lecture Room std=Conputer Exercise Room, hdw=Hardware Workshop CALL=CLR CALL Lab, iLab=CLR instructional Lab NRL=Network and Remote Lecture Room UBIC=University-Business Innovation Center |
| The period and classrooms of SCCP and Graduate Thesis depend on professors who are in charge. |