◆ Annual Review 2001

Computer Devices Laboratory

Kazuyuki Saito

Yasuhiro Hisada
Assistant Professor

The Computer Devices Laboratory (CDL) focuses on education and research on VLSI technologies, devices, and their related area. The main activities are:


  • Physics of Semiconductor Devices, (K. Saito) for the undergraduates
  • Electronic Circuits, (Y. Hisada) for the undergraduates
  • Introduction to Programming, (Y. Hisada) for the undergraduates
  • Principles of VLSI Device and Process Technologies, (K. Saito) for the undergraduates
  • ULSI Technologies (K. Saito) for the graduates


The main objectives of the research in CDL are to develop new environments for VLSI design, diagnoses, and manufacturing. These will be intelligent manufacturing of VLSIs including a statistical representation, a physical representation, and an expert system representation of the environments. The objects of representations are not restricted in the devices and physical technologies, but will cover from the manufacturing system modeling to the yield enhancement and reliability of VLSI.

Research projects have been performed in CDL are as follows:

  • New Dispatching Method for VLSI Manufacturing,
  • Manufacturing System Modeling and Simulation Tool based on Petri Net,
  • Optimization of Resources for VLSI Production; with Fujitsu Tohoku Electronics,
  • Wavelet Analyses on the Electrocardiogram; with Fukushima Medical University,
  • A New Approach for Logic Design; with Fujitsu Tohoku Electronics,
  • Cooperative Co-evolutionally Hardware and its Application; Ministry of Education Research Fund,
  • Research on Parameter Extraction for VLSI Simulation; with NTT Laboratories
  • Research on Defect Analysis of the Implanted Silicon Layer; with NTTLaboratories.


    Kazuyuki Saito

    His research backgrounds are physics of semiconductor, process and device technologies of MOSLSI, and Computer Integrated Manufacturing (CIM). His current interest is on CIM. He thinks CIM as the centralized information manufacturing. On this concept, he developed a new Yield Modeling, Topography Simulator, and Factory Modeling based on queuing theory and Petri Net. The resource planning system developed in CDL is using in the actual VLSI facilities.

    Yasuhiro Hisada

    His interest is a computer simulation of semiconductor crystal growth process. The qualityand yield of LSI is in??uenced by the quality of the semiconductor crystal. He is also interested in biometrics. Now he has been developed measurement and analysis system of a living body signal. This research is related to research of LSI for signal processing and analog circuit and sensor. In addition, this research will become the base of ultimate interface computer and human.
Referred Journal Papers
[k-saito-001:2001]Sumika Arima and Kazuyuki Saito. Operator Allocation Planning for a Product-mix VLSI Assembly Facility. IEICE Trans. Electron., E80-C(6):832-840, 2001.
This paper concerns resource planning in a VLSI assembly facility. A novel algorithm to estimate the resources for machine adjustments is proposed. The algorithm is based on a periodic assignment of multiple sorts of WIPs in a single machine, where the adjustments of machines for the product-mix are considered. The estimated machinery, human resources, and turnaround time were evaluated in a reaql facility, and the proposed method i sconfirmed to be applicable in the weekly or monthly resource planning for the facility.
Unrefereed Papers
[k-saito-003:2001]Sumika Arima and Kazuyuki Saito. Study on Service Discipline in a Product-mix System. In IPSJ the 3rd Tohoku Research Meeting, 2001.
[k-saito-004:2001]Sumika Arima and Kazuyuki Saito. Study on a Novel Dispatching Method in a Product-mix System, - Pseudo-Periodical Priority Dispatching -. In SICE the 197th Tohoku Research Meeting, 2001.
[k-saito-005:2001]Kazuyuki Saito and Sumika Arima. Design and Operation Method of Product-mix System, Software Program for designing and operating the System, and Media storing the Program, 2001.
Ph.D and Other Thesis
[k-saito-006:2001]Ryo Sato. Simulation of Single-Electron Circuit with T-Spice, University of Aizu, 2001.
Thesis Advisor: Kazuyuki Saito
[k-saito-007:2001]Shingo Koseki. Study on WIPAllocations in Product-mix, University of Aizu, 2001.
Thesis Advisor: Kazuyuki Saito
[k-saito-008:2001]Manabu Ichimura. Development of Colored Petri Net Simulator for Semiconductor Manufacturing System Analyses, University of Aizu, 2001.
Thesis Advisor: Kazuyuki Saito
[k-saito-009:2001]Kazuhiro Suzuki. VLSI Topography Simulation with PARADICE-WORLD, University of Aizu, 2001.
Thesis Advisor: Kazuyuki Saito
[k-saito-010:2001]Mitsuru Nagashima. Study on Wire Delay in LSI Circuit, University of Aizu, 2001.
Thesis Advisor: Kazuyuki Saito