Ccomputer Education Laboratory
The Computer Education Laboratory (CEL) had a blank period (no member) for a while and restarted again in summer 2000. The academic area of the laboratory mainly covers computer design methodology. Educational course design for VLSI design and reconfigurable devices are the major themes of this lab. Prof. Kenichi Kuroda, he joined this university in the fall in 1995. He had been a member of the Computer Device Lab for 5 years and moved to this lab in summer 2000. Before his coming to this university, his research topics were superconductor devices, SAW devices, and X-ray optics. After coming this university, he has been interested in VLSI design technology. Especially, dynamically recofigurable devices such as PCA (Plastic Cell Architecture) are the current major research target.
|[kuroken-001:2001]||Y. Okuyama and K. Kuroda. Simulation Framework for Circuits on Plastic Cell Architecture (PCA). In IEICE Technical Report VLD2001-3, pages 15-22. IEICE, May 2001.|
This paper describes a methodology for prototyping PCAobject. We propose interface that allow us to describe PCA object by software. It can be used for early prototyping, reduction for trial assembling low level PCA circuit and co-simulation betweenPCAobject and prototyped object. Using this methodology, we can reduce errors of h igh level design and period for design of PCA objects.
|[kuroken-002:2001]||Y. Okuyama, K. Ono, and K. Kuroda. An Implementation of Bit-variable Multiplier on PCA. In Proceedings of 18th PARTHENON workshop, pages 35-40. PARTHENON Research Society, May 2001.|
This paper discribes an implementation of bit-variablemultiplier on PCA. One of important things for applications on PCA is pipeline behavior of applications. Applications should act as pipeline without dependencies to achieve fast processing speed. However, the multi-precision multiplier could not be implemented as a pipeline with out limitation of bit-length. Weimplement two types of multipliers: (1) completely scalable and (2) bit-length limite d multipliers, and show the difference among these implementations.
|[kuroken-003:2001]||M. Ichikawa, K. Ono, Y. Okuyama, and K. Kuroda. A reconfigurable and Stream-oriented Vector Processor for Plastic Cell Archtecture. In Proceedings of 19th PARTHENON workshop, pages 3-12. PARTHENON Research Society, Dec. 2001.|
In this paper, we propose a vector processor that runs on a Plastic Cell Architecture (PCA). This processor can dynamically reconfigure the number of execution units, the number of registers and the number of ALUs dep ending onload of appliction. All operations in this processor are performed by streams of instructions resulting from RAM read/write operations in the PCA. Therefore, to implement this processor, we created a library to transform the r aw stream into control streams for eachmodule. This paper describes the library to transform streams, the instruction set and implementation of the reconfigurable vector processor.
|[kuroken-004:2001]||K.Kuroda, K. Oguri, andM. Shima. Studyon dynamically reconfigurable architecture, Fundamental Research (C)(2), Ministry of Education Grant-in-Aid: Scientific Research, Contract No.13650381, 2001-2002.|
|[kuroken-005:2001]||K. Kuroda, 2001.
Management Board member, PARTHENON Research Society|
|[kuroken-006:2001]||Yuhichi Okuyama. Doctor Thesis: Design and Implementation of Asynchronous Systems on Plastic Cell Architecture, University of Aizu, 2001.|
|[kuroken-007:2001]||Yutaka Nakajima. Graduation Thesis: Development of VLSI Design Flow Supported by VDEC, University of Aizu, 2001.|
|[kuroken-008:2001]||Yousuke Fukuda. Graduation Thesis: Development of File System on Plastic Cell Architecture (PCA), University of Aizu, 2001.|
|[kuroken-009:2001]||Masato Tamori. Graduation Thesis: Study on VLSI Design Flow using Standard Cell Library, University of Aizu, 2001.|
|[kuroken-010:2001]||Hiroaki Takahashi. Graduation Thesis: Perlin Noise Generator on Plastic Cell Arcitecture (PCA), University of Aizu, 2001.|
|[kuroken-011:2001]||Keigo Kurata. Graduation Thesis: Implementation of Neural Network on Plastic Cell Architecture, University of Aizu, 2001.|
|[kuroken-012:2001]||Toshiyuki Ito. Graduation Thesis: Implementation of Command Line Interface on Plastic Cell Architecture (PCA), University of Aizu, 2001.|
|[kuroken-013:2001]||Tomo Kitaguchi. Graduation Thesis: Implementation of Hierarchical CDFG and its Partitioning Algorithim for Speed In dependent Circuits, University of Aizu, 2001.|