Japanese
◆ Annual Review 2002

Computer Organization Laboratory


Masatoshi Shima
Professor

Satoshi Nishimura
Associate Professor

Robert H. Fujii
Associate Professor

Wanming Chu
Research Associate

Prof. Robert Fujii:

    This year's activities have included the following

    a) Autonomousrobot control: four legged AIBO robots are being used to design and analyze algorithms for individual and group behavior. Participated in two events during the AIBO competition held in Niigata (May 3, 2003). Placed third in both the primary challenge (goal keeper control during a penalty kick situation) and the advanced challenge ( Aibo robot must find the black and white checkered ball and shoot ball into the goal). Major Universities from throughout Japan participated in the two challenges.

    b) Neural Networks: Algorithms for incremental learning, image processing, and speaker recognition were explored. The use of spiking neurons for classification and function approximation were examined.

    c) Computer-AidedMusic: Basic investigations withemphasis on the use of the neural network systems for music composition were carried out.

Prof. Satoshi Nishimura:

  • Hardware for realistic image synthesis,
  • Computer architecture for computer graphics,
  • Reconfigurable architecture for multimedia applications, and
  • Realtime systems for computer music.

Prof. Wanming Chu:

  • Teaching:
    Exercises of Programming3, Database Systems, and Computer Architecture.
  • Research:

      a) Parallel Multithreaded Architectures In this project, we investigated the "horizontal multi threading" technique to improve processor performance. With horizontal multi-threading technique, a processor can issue multiple instructions from multiple threads simultaneously on every clock cycle to exploit not only the instruction-level parallelism(ILP) but also the thread level parallelism (TLP). We developed a multiple-threaded multiple-pipelined processor architecture. The performance of this processor was evaluated with the trace-driven simulation method.

      b) Architectures of interconnection networks Developing an interconnection network to connect a large number of nodes while keeping the low-degree of each node is interesting as the scale of the system become larger and larger. Based on the SGI Origin 2000, we proposed a new interconnection network called "dual-cube". A dual-cube network can link much more nodes compared to traditional hypercube. Embedding a frequently used network in a faulty host network in animportant issue for fault-tolerant computing. In this project, we developed an efficient algorithm for building a Hamiltonian cycle in a dual-cube network with node faults.

Referred Journal Papers
[fujii-01:2002]Hesham H. Amin and Robert H. Fujii. Learning Algorithm for Spiking Neural Networks Based on Synapse Delays. The Journal of Three Dimensional Images, 17(1):191-197, 2003.
A simple model of a spiking neural network which uses mainly synapse delay and not synapse weight as a learning parameter is proposed. Based on this model, function approximation and pattern recognition examples are presented.
Referred Proceeding Papers
[fujii-02:2002]Hesham H. Aminand Robert H. Fujii. Learning Algorithm for Spiking Neural Networks Based on Synapse Delays. In Daming Wei and Qun Jin, editors, 2002 International Conference on Computer and Information Technology, pages 168-174, Aizu-Wakamatsu City, Japan, Sept. 2002. University of Aizu, University of Aizu.
A simple model of a spiking neural network which uses mainly synapse delay and not synapse weight as a learning parameter is proposed. Based on this model, function approximation and pattern recognition examples are presented.
[w-chu-01:2002]Wanming Chu and Yamin Li. Performance Evaluation of a Multiple-Threaded Multiple-Pipelined Java Processor. In N.Callaos Editor, editor, Proceedings of the 6th World Multiconference on Systemics, Cybernetics and The 8th International Conference on Information Systems analysis and Synthesis, pages 281-286, Orlando, Florida, USA,July. 2002. IIIS, International Institute of Informatics and Systemics.
We proposed amultiple-threaded multiple-pipelined Java processor architecture and presented the design and implementation of a trace-driven simulator in this paper. As Java is accepted by both industry and academia as well as the network computing gains importance, the development on high-performance Java processor to execute bytecodes natively becomes interesting. Since the processor configurations can be changed easily just by changing a configuration file, the simulator and the preliminary simulation results presented in this paper can be helpful for turning the processor design decisions.
[w-chu-02:2002]Yamin Li, Shietung Pen, and Wanming Chu. Hamiltonian Cycle Embedding for Fault-Tolerance in Dual-Cube. In Kazuhiko Kato Jie Li and HisaoKameda Editor, editors, Proceedings of IASTED International Conference on Networks, Parallel and Distributed Processing,and Applications, pages 1{6, Tsukuba, Japan, October. 2002. IASTED, ACTA Press.
We showed that a fault-tolerant Hamiltonian cycle can be constructed in a dualcube DC(m) with m-1 faulty links where m is the degree of a cluster(m-cube), one more link is used for connecting to a node in another cluster. Therefore, a ring and a linear array network can be embedded in a DC(m) when there are m-1 and m faulty links, respectively. This is optimal because the degree of a DC(m) is m+1. The dual-cube mitigates the problem of increasing number of links in the large-scale hypercube network while keeps most of the topological properties of the hypercube network. It could be used as an interconnection network for large scale parallel computers.
Ph.D and Other Thesis
[fujii-03:2002]Ebihara Toshihide. Graduation Thesis: Image Processing and Object Recognition for Aibo Soccer Game, University of Aizu, 2003.
Thesis Advisor: Robert H. Fujii
[fujii-04:2002]Oonishi Ryou. Graduation Thesis: Learning Shortest Routes to a Destination Using Temporally Smoothed Spatial Data, University of Aizu, 2003.
Thesis Advisor: Robert H. Fujii
[fujii-05:2002]Meguro Shintaro. Graduation Thesis: Quadrupedal Robot Locomotion, University of Aizu, 2003.
Thesis Advisor: Robert H. Fujii
[fujii-06:2002]Yamada Makoto. Graduation Thesis: Two-Step Door Detection Using Gabor Filter and Neural Networks, University of Aizu, 2003.
Thesis Advisor: Robert H. Fujii
[fujii-07:2002]Hesham H. Amin. Master's Thesis: Learning Algorithm for Spiking Neural Networks Based on Synapse Delays, University of Aizu, 2002.
Thesis Advisor: Robert H. Fujii