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| Department of Computer Hardware |
| Computer Devices Laboratory |
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| Kazuyuki Saito
Professor | Yasuhiro Hisada
Assistant Professor |
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The Computer Devices Laboratory (CDL) focuses on education and research on
VLSI technologies, devices, and their related area. The main activities are:
Education:
- Physics of Semiconductor Devices, (K. Saito) for the undergraduates
- Electronic Circuits, (Y. Hisada) for the undergraduates
- Introduction to Programming, (Y. Hisada) for the undergraduates
- Principles of VLSI Device and Process Technologies, (K. Saito) for the undergraduates
- ULSI Technologies (K. Saito) for the graduates
Research:
The main objectives of the research in CDL are to develop new environments for VLSI design, diagnoses, and manufacturing. These will be intelligent manufacturing of VLSIs including a statistical representation, a physical representation, and an expert system representation of the environments. The objects of representations are not restricted in the devices and physical technologies, but will cover from the manufacturing system modeling to the yield enhancement and reliability of VLSI.
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Research projects have been performed in CDL are as follows:
- Manufacturing System Modeling and Simulation Tool based on Petri Net,
- Optimization of Resources for VLSI Production; with Fujitsu Tohoku Electronics,
- Wavelet Analyses on the Electrocardiogram; with Fukushima Medical University,
- A New Approach for Logic Design; with Fujitsu Tohoku Electronics,
- Cooperative Co-evolutionally Hardware and its Application; Ministry of Education Research Fund,
- Research on Parameter Extraction for VLSI Simulation; with NTT Laboratories
- Research on Defect Analysis of the Implanted Silicon Layer; with NTTL laboratories.
Members:
Kazuyuki Saito:
His research backgrounds are physics of semiconductor, process and device technologies of MOSLSI, and Computer Integrated Manufacturing (CIM). His current interest is on CIM. He thinks CIM as the centralized information manufacturing. On this concept, he developed a new Yield Modeling, Topography Simulator, and Factory Modeling based on queuing theory and Petri Net. The resource planning system developed in CDL is using in the actual VLSI facilities.
Hisada Yasuhiro:
His interest is a computer simulation of semiconductor crystal growth process. The quality and yield of LSI is influenced by the quality of the semiconductor crystal. He is also interested in biometrics. Now he has been developed measurement and analysis system of a living body signal. This research is related to research of LSI for signal processing and analog circuit and sensor. In addition, this research will become the base of ultimate interface computer and human. |
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| [k-saito-01:2003] | K.Saito and S.Arima. ANovel Dispatch Algorithm reducing Adjustment Rate in Processing a Product-mix: Comparison of FCFS, SPT, and New Algorithm. In Proceedings of 2003 IEEE International Symposium on Semiconductor Manufacturing, 2003.
A new dispatch algorithm for dynamic allocation of resources - named pseudo periodical priority dispatching (P3D) - has been developed. The performance parameters of the new algorithm were studied by Monte Calro simulation and compared with two conventional algorithms, FCFS and SPT. IN the case of the bottleneck processing step, the adjustement rate for P3D is the lowest; as a result, the P3D throughput is the highest. Moreover, the response time for P3D is about 65that for FCFS, and the tardiness for P3D is about 28In the case of a non-bottleneck processing step, SPT and P3D produce almost equal average response times and FCFS and P3D produces almost equal tardiness. It is thus concluded from these simulation results that P3D is an effective algorithm that satisfies low adjustment frequency, short response time, and fair dispatching in the case of a broad product-mix. |
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| [k-saito-03:2003] | K.Saito. ANovel Dispatch Algorithm reducing Adjustment Rate in Processing a Product-mix: Compariosn of FCFS, SPT, and New Algorithm. In Special Meeting on ISSM2003, 2003.
Invited Presentation |
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| [k-saito-04:2003] | K. Saito. Study on an eAEcient manufacuturing method of multiple kinds of VLSIs, 2003. |
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| [k-saito-05:2003] | K. Saito, 2003.
Board Member, IEEE Sendai Section |
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| [k-saito-06:2003] | Sumika Arima. Ph.D. Thesis: Performance Analysis of Semiconductor Manufacturing Systems, University of Aizu, 2003.
Thesis Advisor: Kazuyuki Saito
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| [k-saito-07:2003] | Shiro Ishikawa. Graduation Thesis: MOS Device Simulation with VEGA, University of Aizu, 2003.
Thesis Advisor: Kazuyuki Saito
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| [k-saito-08:2003] | Yukihiro Kubo. Graduation Thesis: Graphical Data Output Program of Petri Net Simulation, University of Aizu, 2003.
Thesis Advisor: Kazuyuki Saito
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| [k-saito-09:2003] | Yoshiaki Tachibana. Graduation Thesis: Development of a tool which predicts a makespan considering the priority and processind procedure in the product-mix, University of Aizu, 2003.
Thesis Advisor: Kazuyuki Saito
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| [k-saito-10:2003] | Hiroaki Iwao. Graduation Thesis: Implementation of stochastic event in foring behavior of Petri Net, University of Aizu, 2003.
Thesis Advisor: Kazuyuki Saito
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| [k-saito-11:2003] | Motoki Sakai. Graduation Thesis: Study of Integer DWT in JPEG 2000 to Implement on Excalibur, University of Aizu, 2003.
Thesis Advisor: Kazuyuki Saito
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| [k-saito-12:2003] | Tatsuya Shinohara. Graduation Thesis: VHDL Design of MDCT for MP3, University of Aizu, 2003.
Thesis Advisor: Kazuyuki Saito
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