Computer Devices Laboratory

Kazuyuki Saito Professor	Yasuhiro Hisada Assistant Professor

The Computer Device Laboratory (CDL) focuses on education and research on VLSI technologies, devices, and their related area. Education: For the undergraduate students; Physics of Semiconductor Devices (K. Saito) Principles of VLSI Devices and Process Technologies (K. Saito) Japanese Writing (K. Saito) Information and Industries (K. Saito) Introduction to Programming (Y. Hisada) Electronic Circuits (Y. Hisada) For the graduate students ULSI Technologies (K. Saito) Research: The main objectives of the research in CDL are to develop new environment for VLSI design, diagnoses, and manufacturing. These will be an intelligent manufacturing of VLSIs including a statistical representation, a physical representation, and an expert system representation of the environments. The objects of representations are not restricted in the devices and physical technologies, but will cover from the manufacturing system modeling to the yield enhancement and reliability of VLSI. Currently, a new system to estimate resources for the semiconductor manufacturing has developed. The system has been used in the semiconductor companies for monthly planning of their human and machinery resources. In addition a novel dispatching algorithm for the mixed LSI production is developed. The mixed production is inevitable in the system LSI fabrication. The new dispatching algorithm, named pseudo periodical priority dispatching, is superior to FCFS in setup frequency, and in response time, and to SPT in tardiness. Therefore, the algorithm will be promising to reduce the cost in the future semiconductor manufacturing. Research Projects have been performed in CDL are as follows: Research on the Product-mix VLSI Manufacturing (Grant-In-Aid for Scientific Research) Low Power VLSI Technologies New Dispatching Method for VLSI Manufacturing Manufacturing System Modeling and Simulation Tool based on Petri Net Optimization of Resources for VLSI Production (with Fujitsu Tohoku Electro nics) Wavelet Analyses on the Electrocardiogram (with Fukushima Medical Universi ty) A new Approach for Logic Design (with Fujitsu Tohoku Electronics) Cooperative Co-evolutionally Hardware and its Application (Grant-In-Aid for Scientific Research) VResearch on Parameter Extraction for VLSI Simulation (with NTT Laboratorie s) Research on Defect Analysis of the Implanted Silicon Layer (with NTT Labor atories)

Unrefereed Papers

[k-saito-01:2008]

Kazuyuki Saito. New Fair Dispatching Algorithm reducing Adjustment Frequency for Mixed Products Manufacturing. In New Technology Presentation Meetings, Japan Science and Technology Agency December 2008. request from JST

Academic Activities

[hiroshis-02:2007]

Kazuyuki Saito, 2008. Member of the program committee of International Symposium on Semiconductor Manufacturing (ISSM 2008)

Patents

[k-saito-03:2008]

Kazuyuki Saito. Processing System, Resource Estimation Method, Due Date Estimation Method, Program for Resource Estimation, Program for Due Date Estimation, and Media storing the above programs, 2008-190614, Japan, 2008. (Applied)

Ph.D, Master and Bachelor Theses

[hisada-01:2008]	Kiyoshi Hara. Graduation Thesis: Evaluation of ECG Waveform using Wavelet Trasformation, University of Aizu, 2008. Thesis Advisor: Saito, H. Thesis Advisor: Y. Hisada
[hisada-02:2008]	Takuya Mashiko. Graduation Thesis: Development of System for Measuring and Analyzing Biological Signals, University of Aizu, 2008. Thesis Advisor: Y. Hisada
[hisada-03:2008]	Daigo Takahagi. Graduation Thesis: Comfortable Wake Up System using Sleep Stage, University of Aizu, 2008. TThesis Advisor: Y. Hisada
[k-saito-04:2008]	YShunsuke Kageyama. Graduation thesis: UA Research for Manufacturing Algorithm Considering Order Interval and Date of Delivery, niversity of Aizu, 2008. Thesis Advisor: K. Saito
[k-saito-05:2008]	Akiha Iwase. Master thesis: Augmented virtuality for 3D data visualization, University of Aizu, 2008. Referee: K. Saito
[k-saito-06:2008]	Minoru Owada. Graduation thesis: Research of Program Structure of Semiconductor Simulator Suitable for all Fascilities, University of Aizu, 2008. Thesis Advisor: K. Saito

Others

[k-saito-07:2008]	Kazuyuki Saito. Proposal of Robust Dispatching Algorithm for Mixed VLSI Manufacturing - Pseudo Periodical Priority Dispatch, P3D -. Exhibit in 2008 Taipei International Invention Show & Technomart, September 2008. request from JST
[k-saito-08:2008]	Kazuyuki Saito. Cost Reduction in Mixed Products Manufacturing. Lecture in the Fukushima Industry-University Fair 2009, February 2009.
[k-saito-09:2008]	Kazuyuki Saito. Invention of New Fair Manufacturing System reducing Adjustment Frequency. Lecture at the Aizu Industry-University Meeting, December 2008.
[k-saito-10:2008]	Kazuyuki Saito. Rise and Fall of Semiconductor Industry in Japan. Lecture at UTAR, Malaysia, August 2008.

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