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Tsuneo Tsukahara:
Software-Defined Radio Transceivers
Related to this topic, the following work was done in 2011.
A High-Precision Quadrature Modulator and a Spectrum-Analyzing Method for Multi-band Wireless Transceivers:
Recently the demand for wireless systems such as sensor networks has been rapidly growing. However, radio-wave resources are limited and invaluable especially in these days. Therefore, software-defied radios (SDRs) and cognitive radios, which is a principal application of SDR, can be the key to greatly improving frequencyspectrum efficiency. SDRs demand flexibility and reconfigurability in RF (Radio Frequency) circuits. Therefore, a spectrum-efficient wireless transceiver architecture is indispensable. In this research, we proposed a multi-band wireless transceiver using a high-precision complex quadrature modulator (HP-CQMOD) and a spectrum-analyzing receiver suitable for sensor networks. As the final goal after 2-to-3 year research, we would like to establish a reconfigurable wireless communicator, whose frequency band can be changed according to communication conditions and/or a country’s regulations using reconfigurable RF and baseband processors and downloadable software. This is a kind of cognitive radios based on SDRs. In recent years, multi-level modulations such as Quadrature Amplitude Modulation (QAM) are or will be used in Wireless LANs, digital TVs, and the 4th-generation cell-phones. So, very small modulation errors of QMOD are strongly demanded. In the 2011, we have concentrated on circuit design of low-power HPCQMODs and linear power amplifiers in the transmitter. Moreover, we devised low-distortion receiver front-end circuits and have started research on all-digital PLLs (ADPLL) for carrier-signal generation. RF/IF building blocks we designed have three features as follows:
Low-power high-precision complex quadrature modulators are newly developed, featuring folded-cascode or passive quadrature mixers.
We proposed linear CMOS power amplifiers using compensation techniques for transconductance and capacitance non-linearities.
Low-distortion and wideband techniques are devised for RF low-noise amplifiers and mixers.
Yukihide Kohira:
We investigate design automation methodology for LSI circuits and routing. Due to the increase of scales of LSI circuits and the decrease of time to market of LSI products, design automation systems are widely used in order to design LSI circuits. Since the performance of LSI and PCB products depends on the used design automation systems, it is important to develop design automation methodology continuously in order to obtain good products.
Our research interests are design automation for clock synchronous framework and layout design. In 2011, we focused on following four topics.
General-synchronous Framework In general-synchronous framework, a clock is distributed periodically to all registers but the clock is not necessarily distributed simultaneously. General-synchronous framework is expected to obtain LSI circuits with high performance and low power consumption. The target of this research is to establish a design automation system for general-synchronous framework. In 2011, we investigated clock scheduling to obtain circuits with high performance without increasing power consumption.
Deskew In resent LSI circuits, process variations increase significantly because of the progress of the process technology. The process variations significantly cause delay variations and delay variations affect the performance and the yield of VLSI chips. If the circuit cannot work at the testing process after the fabrication of LSI chips, the circuit can be recovered by deskew in which delay of the programmable delay elements is adjusted. The target of this research is to establish a design automation system for deskew which can improve the yield of LSI chips. In 2011, we established the design flow for deskew and confirmed the effectiveness of deskew.
PCB routing In the recent LSI design, it is difficult to obtain a placement which satisfies both design constraints and specifications due to the increase of the circuit size, the progress of the manufacturing technology, and the speed-up of the circuit performance. Analytical placement methods are promising to obtain the placement which satisfies both design constraints and specifications. In 2011, we proposed an evaluation method for an analytical placement method and we confirmed that the proposed method can obtain placement with the short wire length.
PCB routing Due to the increase of operation frequency, signal propagation delay is requested to achieve a specification with very high accuracy. Since the quality of the routing pattern obtained by automatic routing tools is inferior to the routing pattern obtained by designers, the routing pattern for high density routing are still obtained by hands. However, since the number of nets on a PCB and package has increased and the specification becomes severe, the manual design approaches the limit. The goal of this research is to establish automatic routing tools. In 2011, we proposed an any-angle gridless routing method.
Robert H. Fujii:
Research was carried out in two areas: 1) biologically-based spiking neural networks; and 2) autonomous control of a flying indoor robot.
Neural Networks
A new neural network that uses the ReSuMe supervised learning algorithm for generating a desired output sequence in response to a given input spike sequence was proposed. The network can be used for the recognition input spike sequences as well as for the generation of particular output spike sequences.
Theoretical analyses of coupled spiking neurons were carried out so that spiking neuron model parameters could be adjusted to achieve a desired oscillation frequency.
Robotics The purpose of the research was to design a miniature-size quadrocopter proto-type that would be capable of autonomously fly indoors for surveillance, communication, and other tasks. This year, a proto-type quadrocopter was designed and built and some basic flight control systems were tested.
K. Shinoda, Y. Kohira, and A. Takahashi. Single-Layer Trunk Routing Using Minimal 45-Degree Lines. IEICE Trans. Fundamentals, E94-A(12):2510 2518, 2011.
In recent Printed Circuit Boards (PCB), the design size and density have increased, and the improvement of routing tools for PCB is required. There are several routing tools which generate high quality routing patterns when connection requirement can be realized by horizontal and vertical segments only. However, in high density PCB, the connection requirements cannot be realized when only horizontal and vertical segments are used. Up to one third nets can not be realized if no nonorthogonal segments are used. In this paper, a routing method for a single-layer routing area that handles higher density designs in which 45-degree segments are used locally to relax the routing density is introduced. In the proposed method, critical zones in which non-orthogonal segments are required in order to realize the connection requirements are extracted, and 45-degree segments are used only in these zones. By extracting minimal critical zones, the other area that can be used to improve the quality of routing pattern without worry about connectivity issues is maximized. Our proposed method can utilize the routing methods which generate high quality routing pattern even if they only handle horizontal and vertical segments as subroutines. Experiments show that the proposed method analyzes a routing problem properly, and that the routing is realized by using 45-degree segments effectively.
F. Watanabe and R. H. Fujii. Sequence Learning and Generation Using a Spiking Neural Network. In ICCE Organizing Committee, editor, International Conference on Communications and Electronics (ICCE 2012), pages xxxxxx, Hue, Vietnam, August 2012. IEEE, Hanoi University of Science and Technology (Vietnam),University of Technology Sydney (Australia), Da Nang University of Technology (Vietnam), IEEE Conference Proceedings, IEEE Xplore.
A new neural network that uses the ReSuMe supervised learning algorithm for generating a desired output sequence in response to a given input spike sequence is proposed. The advantages of the new neural network are better learning convergence and a smaller network size.
S. Kuwabara, Y. Kohira, and Y. Takashima. An Effective Overlap Removable Objective for Analytical Placement. In the 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012), pages 135-140, March 2012.
In the recent LSI design, it is difficult to obtain a placement which satisfies both design constraints and specifications due to the increase of the circuit size, the progress of the manufacturing technology, and the speed-up of the circuit performance. Analytical placement methods are promising to obtain the placement which satisfies both design constraints and specifications. Although existing analytical placement methods obtain the placement with short wire length, the obtained placement has overlap. In this paper, we propose Overlap Removable Area as an overlap evaluation method for an analytical placement method. Experiments show that the proposed evaluation method is effective for removing overlap in the analytical placement method.
Y. Kohira and A. Takahashi. An Any-Angle Routing Method using Quasi-Newton Method. In the 17th Asia and South Pacific Design Automation Conference (ASP-DAC 2012), pages 145-150, January 2012.
In recent Printed Circuit Boards (PCB) routing and package routing, any-angle gridless routing is required since the density has increased and the specification becomes severe. In this paper, we propose a routing method which solves an any-angle gridless routing problem by formulating the problem by non-linear programming which is solved by quasi-Newton method. Our proposed method minimizes the total wire length or the total length error while satisfying constraints such as the separation for a route and an obstacle, the separation for two routes, and the angle of bend in a route. Experiments show that the proposed method is effective to obtain any-angle gridless routes in short computational time.
T. Tsushima and T. Tsukahara. Design of Low-Voltage High-Precision Complex Quadrature Modulators. In The 17th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2012), number R4-9, pages pp. 476-481, March 2012.
We proposed two types of High-Precision Complex Quadrature Modulators (HPCQMODs) to lower power-supply voltages and power consumption; one is a foldedcascode HP-CQMOD using current mirrors, and the other is a passive HP-CQMOD with a newly-proposed phase-error calibration circuit.
S. Furuyama and Y. Kohira. A Length Matching Routing Algorithm on Single Layer using Longer Path Algorithm for Single Net. In IEICE Technical Report (VLD2011-131), volume 111, pages 67-72, March 2012.
Y. Kohira and A. Takahashi. An Any-Angle Routing Method using Quasi-Newton Method. In The 24th Workshop on Circuits and Systems, pages 425-530, August 2012.
Y. Kohira and A. Takahashi. An Iterative Improvement Method for Any-Angle Routing using Quasi-Newton Method. In IEICE Society Conference (A-3-20), volume A, page 94, September 2011.
S. Kuwabara, Y. Kohira, and Y. Takashima. An Effective Overlap Removable Objective for Analytical Placement. In IEICE Technical Report (VLD2011-2), volume 111, pages 7-12, May 2011.
K. Shinoda, Y. Kohira, and A. Takahashi. An Equi-Length Routing Method Considering Wirelength of Each Net for Single Layer PCB Routing. In IEICE General Conference (A-3-3), volume A, page 87, March 2012.
A. Hosoya and T. Tsukahara. A Folded-Cascode Mixer with a ThirdOrder Distortion Canceling Technique. In The Papers of Technical Meeting on Electronic Circuits, IEEJ, number ECT-12-017, pages pp. 89-92, Jan. 2012.
T. Tsushima and T. Tsukahara. Design of Low-Voltage High-Precision Complex Quadrature Modulators. In The 2012 IEICE General Conference, number C-12-60, page p. 132, March 2012.
T. Tsukahara. Cooperative Research Fund from ADVANTEST, 2011.
T. Tsukahara. Cooperative Research Fund from Samsung Yokohama Research Institute, 2011.
T. Tsukahara. Commissioned Research Fund from NTT Network Innovation Labs, 2011.
T. Tsukahara. Grants-in aid for Scientific Research (KAKENHI C) from JSPS, 2011-2013.
Y. Kohira, August 2011.
Program Committee Member, 24th Workshop on Circuits and Systems.
T. Tsukahara, 2011.
Member of the IEICE Electronics Society Technical Committee on Integrated Circuits and Devices
T. Tsukahara, March 2012.
Hosted the IEICE Tohoku Branch Seminar at UoA on March 9, 2012. The theme of this seminar: Overview and Perspective of High-Frequency Circuits Supporting Wireless Communications.
Fuyuko Watanabe. Drquence Learning and Generation Using a Spiking Neural Network. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: R. Fujii
Kazuki Endo. Attitude Measurement and Control for a Quadrocopter. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: R. Fujii
Sachi Kiyohara. Modeling and Simulation of a Quadrocopter. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: R. Fujii
Yoshitomo Uranuma. Remote Network Control of a Robot Arm and Camera. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: R. Fujii
Syouhei Furuyama. A Length-Matching Routing Algorithm on Single Layer using Longer Path Algorithm for Single Net. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: Y. Kohira
Hayato Mashiko. Timing Recovery Method for LSI Circuits with Programmable Delay Element. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: Y. Kohira
Takahiro Honda. Acceleration of Parallel Maze-Routing Algorithm Using GPGPU. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: Y. Kohira
Syota Kuwabara. An Effective Overlap Removable Objective for Analytical Placement. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: Y. Kohira
Kazuya Takahashi. Wideband Design Techniques for Low Noise Amplifiers using Active Inductors. Master thesis, Graduate School of Computer Science and Engineering, 2012.
Thesis Adviser: T. Tsukahara
Yuki Sato. Linear CMOS Power Amplifiers using Compensation Techniques for Transconductance and Capacitance Non-linearities. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: T. Tsukahara
Wataru Tamura. Analysis of CMOS Time-to-Digital Converters for ADPLLs. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: T. Tsukahara
Takahiro Tsushima. Design of High-Precision Complex Quadrature Modulators. Master thesis, Graduate School of Computer Science and Engineering, 2012.
Thesis Adviser: T. Tsukahara
Akihumi Hosaya. A folded Cascode Mixer with a Third-order Distortion Cancelling Technique. Master thesis, Graduate School of Computer Science and Engineering, 2012.
Thesis Adviser: T. Tsukahara
Takahiro Sakamoto. A CMOS Passive Mixer With a DC Offset Canceller. Master thesis, Graduate School of Computer Science and Engineering, 2012.
Thesis Adviser: T. Tsukahara
Hirota Takahashi. A High-Precision Complex Quadrature Modulator using a Quadrature Hybrid Based on LC Networks. Graduation thesis, School of Computer Science and Engineering, 2012.
Thesis Adviser: T. Tsukahara
T. Tsukahara. Seminar: Basics and Applications of OP amplifiers. Aizu Monozukuri Gijuku, Feb. 2012.