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1. Project Description

The shifts in hardware and software technologies force designers and users to look for microarchitectures that process instructions stream with high performance and low-power consumption. In order to achieve high performance, microarchitecture research has emphasized instruction-level parallelism processing, which has established in superscalar architecture without major changes to software. Since the program contains no explicit information about available ILP, it must be discovered by the hardware, which must construct a plan of actions for exploiting parallelism. In short, computers have thus far achieved this goal at the expense of tremendous hardware complexity – a complexity that has grown so large as to challenge the industry's ability to deliver ever-higher performance.

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Circular Queue-register Structure.

This project focuses on the research about a novel low power and high performance parallel processor processor based on Queue computation model, where Queue programs are generated by traversing a given data flow graph using level order traversal. The Queue processor uses a circular queue-register to manipulates operands and results, and exploits parallelism dynamically with "little efforts" when compared with conventional architectures. The nonexistence of false dependencies allows programs to expose maximum parallelism that the queue processor can execute without complex and power-hungry hardware such as register renaming and large instruction windows. Parallel processing allows queue processors to speed-up the execution of applications. We are researching and developing a complete tool-chain for this promising computing model consisting of: compiler, assembler, functional and cycle accurate simulator, and hardware design.

2. Members:

2. Publications

Others

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The complete developed tool-chain is made of compiler (QCom), assembler(Qasm), functional and cycle accurate simulator (QSim), and soft-core hardware processor (QueueCore (QC-1, QC-2, and QC-3)). If you are interested in this project, please contact Prof. Ben Abdallah for further details.
Note: Your use of any information or materials on this website is entirely at your own risk, for which we shall not be liable.

(c) Ben Abdallah Abderazek, 2000-2009.