Professor |
Assistant Professor |
In 2004, the laboratory research has been conducting in three directions: CMOS beta-Driven Threshold Elements and Artificial Neurons, CMOS Neuro-Fuzzy Circuits and Devices, and Synthesis of Asynchronous Circuits from Behavioral Specifications. Digital-analog CMOS threshold elements and artificial neurons have been very popular for some application during two last decades. One of the important characteristics of these devices is the degree of their implementability, i.e. the restriction on the class of the threshold functions that can be reliably implemented by a single element under the drift of technological and environmental parameters. Previously we have suggested new CMOS beta-driven threshold element, for which the limiting parameter is only the threshold value. The idea of such threshold element is based on the representation of the threshold function in the ratio form. It allows implementing threshold functions as a ratio of conductivities of n- and p- chains of CMOS device. We studied the problems of increasing functional power of an artificial neuron on the base of the beta-driven CMOS threshold element. The following results were obtained:
The second direction is connected with the problem of designing CMOS Neuro-Fuzzy Circuits and Devices. During several last decades for solving sophisticated control problems and data processing neuromorphic methods have been effectively developing, i.e. methods inspired with knowledge of processes in a nervous system. The special place among these methods took ANN (Artificial Neural Networks). ANN can be realized as software implementation on universal or specialized processors. Alternative to this is an analog-digital hardware implementation of the ANN. The main advantage of such implementation is the high value relation throughput/complexity. The main lack of this implementation is the limitation on implementability, i.e. on complexity of functions implemented by one element. Increasing above relation is the main result of the beta-driven circuitry application. The niche for analog-digital ANN actuates: image preprocessing (artificial retina etc.), intellectual fuzzy controllers, robotic control (locomotion, scrub moving etc.), pattern recognition, fault detection, and many others. The research in this direction implies the creation of methods and tools of designing full and semi-custom neuro-fuzzy VLSI and embedded devices and systems. These methods and tools include creating threshold elements and devices, learnable beta-driven artificial neurons, fuzzy threshold elements and devices; embedded neuro-processors, neuro-arrays and fuzzy controllers and correspondent IP (intellectual properties); design methods and design know-how for analog/digital devices and systems. The third direction is the development of a synthesis method for asynchronous circuits. Starting from a behavioral description written in C language, the method synthesizes area/performance optimum asynchronous circuits. As a result, asynchronous circuits can be synthesized by designers easily withoutknowing the detail of asynchronous circuits.The main achievements of 2004 are:
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[hiroshis-01:2004] |
H. Saito, H. Nakamura, M. Fujita, and T. Nanya. Logic Optimization of Asynchronous Speed-Independent Circuits Using Transduction Methods. IPSJ Transaction., 45(5):1289-1299, 2004. |
In this paper, we present an optimization method of asynchronous speed-independent circuits based on transduction methods. Although transduction methods are well used for the optimization of multi-level combinational circuits, the direct application to speed-independent circuits may lead to a malfunction of circuits because the property of hazard-freeness guaranteed by circuits is broken. Therefore, we discuss how to optimize speed-independent circuits by using transduction methods without leading anyhazardous behavior. For instance, we extend the gate substitution algorithm in transduction methods. Finally, we evaluate the eAEciency of the extended gate substitution algorithm by applying it to several benchmark circuits. |
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[marak-01:2004] |
V. Varshavsky, V. Marakhovsky, and I. Levin. Artificial Neurons Based onCMOS Beta-Driven Threshold Elements with Functional Inputs. WSEAS Transactions on Systems, 3(2):142-148, 2004. |
This paper deals with a CMOS based artifficial neuron implemented by thresh-old elements. We consider the artificial neuron as a threshold element with controlled inputs having weights formed during a learning process. A so-cold beta-driven threshold element is used for in the scheme of the neuron. Functioning of this e lement is described in a specific ratio form. The beta-driven implementation is based on using summarized conductivities of n- and p-chains of aCMOS gate as the ratio of weighted sums. The threshold element has a wider functional capability in comparison with the traditional functional basis. Moreover, its functional capability can be enriched. We propose a method for increasing the functional capability of the threshold element by introducing so-called functional inputs. Each functional input corresponds to a Boolean sum(or product) of a particular subset of input variables. This sum (or product) serves as a single input of the threshold element. It is shown that introducing functional inputs enables expansion of the functional capability of beta-driven elements up to the capability to implement an arbitrary monotonic function. The CMOS based implementation of the beta-driven threshold element with newly proposed functional inputs is presented. Methods of the current stabilization of functional inputs are proposed. In the proposed implementation of the artificial neuron, each input weight is determined by the current value via a suitable current stabilizer. This value can be effectively controlled by the value of the voltage at the gate of one of the current stabilizer's transistors. The paper presents examples of the SPICE simulation of behavior of the proposed artificial neuron in the modes of learning and maintaining the input weight values. |
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[marak-02:2004] |
V. Varshavsky, V. Marakhovsky, I. Levin, A. Ruderman, and N. Kravchenko. CMOS Fuzzy Decision Diagram Implementation. WSEAS Transactions on Systems, 3(2):615-620, 2004. |
The subject of the study is design of multi-valued (analog) CMOS fuzzy controllers. A functional completeness of summing amplier with saturation in a multi-valued logic of an arbitrary value proven in previous works gives a theoretical background for analog implementation of fuzzy devices. Compared with the traditional approach based on explicit fuzzification / defuzzification procedures analog fuzzy implementation has the advantage of higher speed, lower consumption, smaller die area and more. In the present paper, we expand functional capabilities of summing amplifier by using masking of the input. The paper provides design example for an industrial fuzzy controller implementation by the proposed mask circuit and SPICE simulations of the controller. |
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[marak-03:2004] |
V. Varshavsky, V. Marakhovsky, I. Levin, and N. Kravchenko. Fuzzy Controller CMOS Implementation. WSEAS Transactions on Circuits and Systems, 3(9):1762-1769, 2004. |
The subject of the study is hardware design of fuzzy controllers as CMOS analog devices on the base of controller descriptions in the view of multi-valued logical functions. A functional completeness of summing amplifier with saturation in an a rbitrary-valued logic is proven that gives a theoretical background for analog implementation of fuzzy devices. Compared with the traditional approach based on explicit fuzzification, fuzzy inference, and defuzzification procedures analog fuzzy implementation has the advantages of higher speed, lower power consumption, smaller die area and more. The paper illustrates a design example for real industrial fuzzy controller and provides SPICE simulation results of its functioning. |
[hiroshis-02:2004] |
T. Matsumoto, H. Saito, and M. Fujita. An Equivalence Checking Method for C Descriptions based on Symbolic Simulation with Textual Differences. In International Conference on Advences in Computer Science and Technology (IASTED), pages 246-251, November 2004. |
In this paper, an efficient equivalence checking method for two C descriptions is described. The equivalence of two C descriptions is proved by symbolic simulation. Symbolic simulation used in this papercanprovethe equivalence of all of the variables in the descriptions. However, to verify the equivalence of all of the variables takes long time if large descriptions are given. Therefore, to improve the verification, our method identifies textual differences between descriptions. The identified textual differences are used to reduce the number of equivalence checking among variables. The proposed method is implemented in C language and evaluated at some C descriptions. |
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[hiroshis-03:2004] |
H. Saito, M. Kawanabe, M. Imai, H. Nakamura, and T. Nanya. A Synthesis Method of Asynchronous Control Circuits from a Behavioral Description. In DA symposium, pages 289-294. IPSJ, July 2004. |
In this paper, we propose a synthesis method of asynchronous control circuits from a system description written in C language under several restrictions. To deal with large descriptions, control circuits are synthesized by mapping cell controllers and basic components for all statements in given descriptions. In addition to the synthesis method, we propose two optimization methods to reduce area and control overhead in synthesized circuits. To show the efficiency of our proposed methods, we compare the quality of a synthesized circuit in terms of area and performance with respect to the ones by other synthesis methods (in Japanese). |
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[hiroshis-04:2004] |
M. Kawanabe, H. Saito, M. Imai, H. Nakamura, and T. Nanya. Design Space Reduction Filter in Asynchronous Data-path Synthesis. In DA symposium, pages 295-300. IPSJ, July 2004. |
A synchronous data-path synthesis tool Mercury explores a set of area and/or performance optimum data-path circuits from a data flow graph (DFG), a resource library and a set of design constraints. However, because the design space explored by Mercury will be large, it cannot synthesize data-path circuits froma large DFG. To solve this problem, in this paper, we propose two filters to reduce the design space. These filters utilize schedule information to constrain the designspace exploration.Although area optimum data-path circuits may not be synthesized whenwe use these filters, performance optimum data-path circuits can be synthesized efficiently from a large DFG. We implemented those filters in Mercury and confirmed the efficiency of these filters through experiments (in Japanese). |
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[hiroshis-05:2004] |
T. Matsumoto, H. Saito, and M. Fujita. An Approach to Formal Verification of Behavioral Descriptions in C Language with Existing Methods. In DA symposium, pages 241-246. IPSJ, July 2004. |
[hiroshis-06:2004] |
T. Matsumoto, H. Saito, and M. Fujita. An EAEcient Equivalence Checking of Similar C Descriptions withUse of the Textual Difference. In International Workshop on Logic and Synthesis (IWLS), pages 314-320, June 2004. |
In this paper, an efficient equivalence checking method for two C descriptions is described. The equivalence of two C descriptions is proved by symbolic simulation. Symbolic simulation used in this paper proves the equivalence of all of the variables in the descriptions. However, to verify the equivalence of all of the variables takes long time if large descriptions are given. Therefore, to improve the verification, our method identifies textual differences between descriptions. The identified textual differences are used to reduce the number of equivalence checking among variables. The proposed method is implemented in C language and evaluated at the descriptions for Inverse Discrete Cosine Transformation. |
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[marak-04:2004] |
V. Varshavsky, V. Marakhovsky, I. Levin, and N. Kravchenko. Functionally Complete Element for Fuzzy Control Hardware Implementation. In The 2004 47th IEEE Midwest Symposium on Circuits and Systems (MWSCAS 2004), Conference Proceedings, Volume III of III, pages 263-266, Hiroshima, Japan, July 2004. Hiroshima University, IEEE Press. |
It is proposed to implement fuzzy control devices as multi-valued logic functions, using directly analog input variables and forming analog values of output variables. CMOS summing amplifiers are used as basic elements for designing appropriate circuits. It has been proved that a summing amplifier is a functionally complete element in arbitrary-valued logic. In a plenty of cases this approach enables principally simplification of fuzzy logic controllers for a broad class of applications. Some fuzzy control hardware implementations using this design approach are given. |
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[marak-05:2004] |
V. Varshavsky, V. Marakhovsky, I. Levin, and N. Kravchenko. Fuzzy Controller CMOS Implementation. In 3rd WSEAS Int. Conf. on Electronics, Control and Signal Processing (ICECS 04), CD edition, page 8, Crete Island, Greece, Oct. 2004. WSEAS, WSEAS. |
The subject of the study is hardware design of fuzzy controllers as CMOS analog devices on the base of controller descriptions in the view of multivalued logical functions. A functional completeness of summing amplifier with saturation in an arbitrary-valuedlogic is proventhat gives a theoretical background for analog implementation of fuzzy devices. Compared with the traditional approach based on explicit fuzzification, fuzzy inference, and defuzzification procedures analog fuzzy implementation has the advantages of higher speed, lower power consumption, smaller die area and more. The paper illustrates a design example for real industrial fuzzy controller and provides SPICE simulation results of its functioning. |
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[marak-06:2004] |
V. Varshavsky, V. Marakhovsky, I. Levin, A. Ruderman, and N. Kravchenko. Fuzzy Decision Diagram Realization by Analog CMOS Summing Amplifiers. In Proceedings of the 11th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2004), pages 286-289, Tel Aviv, Dec. 2004. IEEE, IEEE Press. |
A functional completeness of summing amplifier with saturation in amultivalued logic of an arbitrary value proven in previous works gives a theoretical background for analog implementation of fuzzy devises. Practical design techniques for multi-valued analog fuzzy controllers still have to be developed. Compared with the traditional approach, analog CMOS fuzzy controller implementation has the advantages of higher speed, low power consumption, smaller die area and more. The paper introduces some special design techniques and provides design example for an industrial fuzzy controller implementation solidified by SPICE simulations. |
[hiroshis-07:2004] |
H. Saito and T. Yoneda. Asynchronous Data-Path Circuit Synthesis by Using Force-Directed Scheduling Algorithm and Consideration to Improve Efficiency. In IEICE Tech. Report VLP, pages 115-120. IEICE, December 2004. |
[hiroshis-08:2004] |
H. Saito. Ministry of Education Scientific Research Fund (#16700050), 2004-2005. |
[hiroshis-09:2004] |
H. Saito, 2004-present. Member, IPSJ SIGSLDM steering committee |
[hiroshis-10:2004] |
H. Saito, 2004. Member, IEEE |
[hiroshis-11:2004] |
H. Saito, 2004. Member, ACM |
[hiroshis-12:2004] |
H. Saito, 2004. Member, IEICE |
[hiroshis-13:2004] |
H. Saito, 2004. Member, IPSJ |
[marak-07:2004] |
V. Marakhovsky, 2004. Member of IEEE |
[marak-08:2004] |
V. Marakhovsky, 2004. Member of ACM |
[marak-09:2004] |
V. Varshavsky, V. Marakhovsky, I. Levin, and N. Kravchenko. Functional Device, July 2004. |
[marak-10:2004] |
V. Varshavsky, V. Marakhovsky, I. Levin, and N. Kravchenko. Median Circuit and Fault-Tolerant Circuit, Aug. 2004. |
[marak-11:2004] |
V. Varshavsky, V. Marakhovsky, I. Levin, and N. Kravchenko. Fuzzification Circuit, Defuzzification Circuit and Fuzzy Functional Circuit, Feb. 2005. |
[marak-12:2004] |
Seiichi Sano. Graduation Thesis: Design Methods for CMOS Fuzzy Control Devices, University of Aizu, 2005. Thesis Advisor: Marakhovsky, V. |
[marak-13:2004] |
YUUTA Tanagi. Graduation Thesis: Fuzzy Controller CMOS Implementation, University of Aizu, 2005. Thesis Advisor: Marakhovsky, V. |
[marak-14:2004] |
Yasushi Kisara. Graduation Thesis: Mask Function in a Fuzzy Controllers Synthesis Procedure, University of Aizu, 2005. Thesis Advisor: Marakhovsky, V. |
[marak-15:2004] |
Akira Sanbongi. Graduation Thesis: Median Fiunction and its CMOS Implementation, University of Aizu, 2005. Thesis Advisor: Marakhovsky, V. |
[marak-16:2004] |
Koujii Watanabe. Master Thesis: CMOS Beta-Driven Element Learnable to Arbitrary Threshold Function of 7 variables, University of Aizu, 2005. Thesis Advisor: Marakhovsky, V. |