Computer Organization Laboratory

Tosiaki Miyazaki Professor	Robert H. Fujii Associate Professor	Satoshi Nishimura Associate Professor	Wanming Chu Research Associate

The following researches are progressed in Computer Organization Laboratory: Toshiaki Miyazaki: Die-hard sensor network Related to this topic, the follwoing three works were done in 2005. Synchronization protocol: To establish the communication among autonomous wireless sensor nodes, a new synchronous protocol was proposed. It synchronizes the wake-up timing autonomously in the whole network with flooding. The protocol can save energy by turning off the data communications and sensing functions while the sensor node is not communicating. The protocol was implemented using commercial wireless sensor nodes and evaluated. The evaluation results show that sensor nodes newly added to a network can synchronize immediately, and a multi-hop route can be established. In addition, we confirmed multi-clustered sensor networks can be merged into one cluster network autonomously. This could make the routing protocol easy. Sensor allocation: A sensor allocation technique was proposed, which can be applied to a sensor network constructed of many sensor nodes having multiple sensors. The allocation problem was formulated as a 0-1 Integer Linear Programming. Using a BDD (Binary Decision Diagram) based solver, all optimal and feasible solutions can be obtained within 5 seconds in the case of 100 sensors. Examinations of Small-World and Scale-Free characteristics in logic circuits: Recently, it has been reported that many networks existing in both natural and artificial things have the Small-World (SW) and/or Scale-Free (SF) characteristics. In general, the SW/SF networks can propagate information quickly from one to another, and have some robustness for random accidents or attacks. Theses characteristics seem good for realizing the die-hard sensor network node. To establish a new logic circuit design method using the SW/SF characteristics intentionally, we examined many benchmark circuits from the SW/SF point of view. The evaluation results show that relatively large circuits have the SW/SF characteristics. In addition, we confirmed if a circuit has the SF structure, the circuit obtained by logic optimizations still has the SF structure. This could be used as a criterion to check the robustness of the circuits. Hardware design for an scalable array processor Collaborated with the Operating System Laboratory in the University of Aizu, the hardware architecture of the scalable array processor dedicated to high-speed matrix-matrix operations was specified. In addition, the prototype system design using FPGAs (Field Programmable Gate Arrays) was started to evaluate the feasibility of the architecture. Robert Fujii: Neural Networks Artificial Neural Networks emulate some of the functions carried out in the brain. A new model of a neuron called "spiking neuron" that can process temporal information was investigated. The input data into a spiking neuron consists of spike trains; each spike train consists of a number of spikes with real-valued inter-spike times. Each data spike consists of a unit amplitude short duration digital pulse. The inter-spike times can be used to encode information. A method to map a spike train into an output firing time with close to a one-to-one relationship between input and output was obtained. A learning algorithm for spiking neurons was developed. Computer simulations have shown that the proposed mapping and learning methods were effective in applications such as function approximation, sound recognition, and sequence recognition. Future work in this area will include explorations of new types of neurons and neural networks, modeling of the auditory nerve system, robotic control using spiking neural networks, and hardware implementations of neural networks. Robotics Research in the area of autonomous,intelligent,and interactive robotics for the home or in a work environment is gaining momentum. Reseach and development work in the areas of image processing, robot-to-robot wireless communication,and real-time learning were carried out. In the image processing area the following were carried out: a) simple algorithms for the AIBO soccer league occluded ball and pole recognition and distance measurements for self-localization;and b) AIBO soccer league object recognition under various lighting conditions. In the robot-to-robot wireless communication area, the performance of the TCP and UDP protocols were evaluated. Results showed that for the AIBO soccer league game, the UDP protocol when used with appropriate process delays was more efficient than the TCP protocol. Real-time learning of soccer ball interception and reception for the RoboCup simulation league was implemented.In this learning algorithm, multi-agents learned to position themselves better during a simulated soccer game. Future work in the robotics area includes two-legged robot locomotion control using neural networks and cooperative bahavior of two-legged robots in order to carry out a common task. Computer-aided Music The goals of this research were : a) off-line generation of accompaniment variations for a given musical piece; and b) structural understanding of tonal classical music. The computer-generated accompaniment variations were based on musical cadence progression rules which allow for various options. The musical structure understanding research implemented the grouping rules, the metrical rules, and the time-span reduction rules of the Generative Theory of Tonal Music (GTTM). More research and development is needed to have a reliable and useful musical analysis computer based tool. Future research in this area include mathematical modeling (e.g. topological analysis) of musical structures in order to gain an insight into the relationship between music and emotion. Satoshi Nishimura: Hardware for realistic image synthesis, Computer architecture for computer graphics, Reconfigurable hardware for multimedia applications, and Realtime systems for computer music Wanming Chu: Horizontal Multi-threading Technique This research focused on a Multiple-Threaded Multiple-Pipelined processor architecture by using the horizontal multithreading technique which tries to fetch, issue and execute multiple instructions from multiple threads in parallel in every clock cycle. We proposed a Java bytecode processor architecture which uses the horizontal multithreading technique to execute Java bytecodes in parallel. Architectures of interconnection networks The hypercube has been widely used as the interconnection network in a wide variety of parallel systems. A low-degree dual-cube was proposed as an alternative to the hypercubes. The dual-cube mitigates the problem of increasing number of links in the large-scale hypercube network while keeps most of the topological properties of the hypercube network. It could be used as an interconnection network for large scale parallel computers.

Refereed Journal Papers

[fujii-01:2005]	Hesham H. Amin and Robert H. Fujii. Spiking Neural Network Inter-Spike Time Based Decoding Scheme. IEICE Transactions on Information and Systems, E88-D(8):1893 - 1902, 2005.
	Information transmission among biological neurons is carried out by a complex series of spike signals. The input inter-spike arrival times at a neuron are believed to carry information which the neurons utilize to carry out a task. In this paper, a new scheme which utilizes the input inter-spike intervals (ISI) for decoding an input spike train is proposed. A spike train consists of a sequence on input spikes with various inter-spike times. This decoding scheme can also be used for neurons which have multiple synaptic inputs but for which each synapse receives a single spike withone one input time window. The ISI decoding neural network requires only a few neurons. Example applications show the usefulness of the decoding scheme.
[fujii-02:2005]	Hesham H. Amin and Robert H. Fujii. Spike Train Classification Based on Spiking Neural Networks. WSEAS Transactions on Systems, 4(3):219-224, 2005.
	Spiking Neural Networks (SNNs) use inter-spike time coding to process data instead of the rate code used in the conventional neural networks. A new learning algorithm for an SNN that uses spike sequence times as inputs is introduced. The learning algorithm is based on decoding of the input spike train first into a spatio-temporal pattern and uses simple criteria for learning. The approach was applied on a classification problem.
[miyazaki-01:2005]	T. Inoue, S. Tani, H. Takahashi, S. Minato, T. Miyazaki, and K. Toyoshima. Deign and Implementation of the Incrementally Deployable Multicast System based on Flexcast. IEICE Trans. on Information and Systems (Japanese Edition), J88-D-I(2):272-291, 2005.
	The IP multicast technology has been researched for more than 10 years, but it is not still used widely in the Internet. One of the reasons why IP multicast is not popular is a large initial cost. Flexcast, an application-layer multicasting technology proposed by the authors, has the same mechanism as the IP multicast has, in terms of duplicating the incoming multicast packets in the router, but it is realized in the higher protocol layer compared to the IP multicast. Thus, we can introduce Flexcast step by step. Based on the Flexcast technology, we developed a multicast system. To realize rich expandability, we introduce PC cluster-based multicast router. We also realize a translation mechanism between Flexcast and IP multicast easily to connect each other. Furthermore, a group address management problem which is a big issue in the IP multicast is solved by localizing the authority for the address management. The multicast system utilizing conventional PCs achieves 1Gbps throughput and has the high expandability.
[miyazaki-02:2005]	T. Murooka, M. Hashimoto, N. Takahashi, and T. Miyazaki. Realization of a High-Performance Active-Network Equipment Enabling On-the-Fly Packet Inspection and Modification. IEICE Trans. on Information and Systems (Japanese Edition), J88-D-I(2):272-291, 2005.
	This paper describes an active network node, called A-BOX, which can monitor all incoming packets and modify the header of the packets with 1Gbps wire-speed. Based on the header structure information, A-BOX modifies any portion of the header freely. To perform high-speed header modification, a pipeline processing scheme is introduced. The packet monitoring mechanism is realized by using the header analysis part of the header modification circuits, and providing accumulators counting the number of the same kind of incoming packets. W realized a traffic monitor with 1ms time precision, and a video-streaming splitter that can serve more than 1,000 receivers, and confirmed A-BOX meets the required functions and performance.
[w-chu-01:2005]	Yamin Li, Shietung Peng, and Wanming Chu. Fault-Tolerant Cycle Embedding in Dual-Cube with Node Faulty. International Journal of High Performance Computing and Networking, 3(1):45-53, 2005.
	In this paper, a low-degree dual-cube was proposed as an alternative to the hypercubes. A dual-cube DC(m) has m + 1 links per node where m is the degree of a cluster (m-cube) and one more link is used for connecting to a node in another cluster. There are 2m+1 clusters and hence the total number of nodes in a DC(m) is 22m+1. We showed that a fault-free cycle containing at least 22m+1 - 2f nodes can be constructed in a DC(m) with f <= m faulty nodes. Since the dual-cube keeps most properties of the hypercube and can link much more nodes than other variations of hypercube with the same number of links per node, it could be used as an interconnection network for large scale parallel computers.

Refereed Proceeding Papers

[fujii-03:2005]	Hesham H. Amin and Robert H. Fujii. Spike Train Learning Algorithm, Applications, and Analysis. In 2005 IEEE International 48th Midwest Symposium on Circuits and Systems, pages 683-687, Cincinnati, Ohio, August 2005. IEEE, IEEE.
	An algorithm for spike train mapping and learning using spiking neural network (SNN) is introduced. Analysis of the proposed spike train mappinglearning algorithm provides a method for selecting appropriate mapping and learning parameters such as neuron threshold and mapping time window. An application is used to show the robustness of the learning algorithm. A comparison of the proposed SNN learning algorithm with the back-propagation learning algorithm for classification problem is presented.
[fujii-04:2005]	Hesham H. Amin and Robert H. Fujii. Sound Classification and Function Approximation Using Spiking Neural Networks. In G. Huang Editors. D. Huang, X. Zhang, editor, Advances in Intelligent Computing, pages 621-630, Berlin, Germany, June 2005. ICIC, Springer-Verlag.
	The capabilities and robustness of a new spiking neural network (SNN) learning algorithm are demonstrated with sound classification and function approximation applications. The proposed SNN learning algorithm and the radial basis function (RBF) learning method for function approximation are compared. The complexity of the learning algorithm is analyzed.
[miyazaki-03:2005]	S. Ohta and T. Miyazaki. Passive packet loss monitoring that employs the hash-based identification technique. In Proc. the Ninth IFIP/IEEE International Symposium on Integrated Network Management (IM 2005), 2005.
	Passive packet loss monitoring is attractive because of its accuracy. However, the technique is handicapped by its large storage and bandwidth costs. This difficulty is avoided by utilizing a hash-based packet identification technique. However, several technical problems must be solved to deploy this technique in real-world IP networks. This paper focuses on these problems. The paper details a packet recording sequence as well as a time efficient packet matching algorithm. The timestamp coding scheme is also described to estimate the time dependency of packet loss. The effectiveness of the proposed method is confirmed through experiments.
[miyazaki-04:2005]	T. Inoue, S. Tani, H. Takahashi, S. Minato, T. Miyazaki, and K. Toyoshima. Design and Implementation of Advanced Multicast Router Based on Cluster Computing. In Proc. IEEE 11th International Conference on Parallel and Distributed Systems (ICPADS2005), Fukuoka Japan, July 2005.
	This paper presents the design principles of an advanced multicast router and evaluates its performance in experiments. Our multicast router features cluster computing, which has been used to develop a high performance search engine and GRID computing. The router consists of a small-scale cluster attached to a regular router. While it is not a standard router architecture, it offers high extensibility and availability without much investment. Our design is based on the new multicast technology called Flexcast [10], which naturally supports incremental deployment of the multicast infrastructure unlike IP multicast. In Flexcast, multicast packets are replicated at each router like IP multicast. However, Flexcast is implemented in the layer above the network layer; the multicast stream is transmitted by unicast between routers that support Flexcast, and bypasses routers that do not support it. Our goal of this paper is to bring the concept of incremental deployment to a multicast router as well as the protocol, by means of cluster computing. We implemented several routers on Linux PCs and tested them in experiments. The results of the experiments reveal that forwarding performance and availability are greatly enhanced by cluster computing. Our efforts provide the economy, efficiency, and extensibility needed to realize the multicast infrastructure.
[miyazaki-05:2005]	T. Murooka, M. Hashimoto, T. Miyazaki, and Y. Nakamura. Real-Time Traffic Shape Monitoring System for Video/audio Streaming Systems. In Proc. IEEE/IEICE the 11th Asia-Pacific Conference on Communications (APCC2005), Perth Australia, Oct. 2005.
	This paper introduces the requirements, concept and effects of a high timeresolution traffic volume transition shape monitoring system that can observe selected traffic flow shapes using a well-considered time resolution on real-time manner. The time-resolution is determined as one millisecond, according to the relationship between the behavior of the streaming applications and the statistical assumption used to calculate the traffic volume. The implemented prototype can display traffic volume transition shapes in an oscilloscope style and clearly indicates the differences in traffic shapes that cannot be observed with conventional traffic monitoring systems.

Unrefereed Papers

[miyazaki-06:2005]	T. Miyazaki. Logic circuit examinations based on SmallWorld/Scale-Free characteristics. In IEICE TG-VLSI (Design Gaia), volume VLD2005-82, pages 37-40, Dec. 2005.
[miyazaki-07:2005]	T. Miyazaki. Logic circuit examinations based on Small-World characteristics. In IEICE society conference, volume A-3-3, Sept. 2005.

Grants

[miyazaki-08:2005]

T. Miyazaki. Commissioned Research Fund from NTT Laboratories, 2005.

Academic Activities

[miyazaki-09:2005]	T. Miyazaki, June 2005. Lecturer 'FPGA technologies changing system design' in 'System LSI design technologies course', IEICE Advanced Open Lecture Series
[miyazaki-10:2005]	T. Miyazaki, 2005. Editor, Transactions Special issue 'Autonomous Decentralized Systems', IEICE
[miyazaki-11:2005]	T. Miyazaki, 2005. Steering committee member, Technical Group for Reconfigurable Systems, IEICE
[miyazaki-12:2005]	T. Miyazaki, 2005. Steering committee member, Technical Group for VLSI Design Automation, IEICE
[miyazaki-13:2005]	T. Miyazaki, 2005. Technical Program Committee Member, ISVLSI2006 (IEEE International Symposium on VLSI)
[miyazaki-14:2005]	T. Miyazaki, 2005. Reviewer, Proceedings of the IEEE
[miyazaki-15:2005]	T. Miyazaki, 2005. Member, IEICE
[miyazaki-16:2005]	T. Miyazaki, 2005. Member, IPSJ
[miyazaki-17:2005]	T. Miyazaki, 2005. Member, IEEE (CAS, ComSoc, CS)

Patents

[miyazaki-18:2005]	S. Tani, T. Miyazaki, and N. Takahashi. Multicast data communication method, multicast data communication system, relay equipment, relay method, relay program, and media saving the relay program, Sept. 2005.
[miyazaki-19:2005]	T. Hayashi and T. Miyazaki. Output data selection equipment based on searched-signallookahead method, Sept. 2005.
[miyazaki-20:2005]	T. Hayashi and T. Miyazaki. Database manager, Aug. 2005.
[miyazaki-21:2005]	T. Hayashi and T. Miyazaki. Request aggregator, Oct. 2005.
[miyazaki-22:2005]	T. Murooka, M. Hashimoto, and T. Miyazaki. Measurement equipment and its method for communication quality, Dec. 2005.
[miyazaki-23:2005]	S. Seduhkin, T. Miyazaki, K. Kuroda, H. Oi, and Y. Okuyama. Operation unit, March 2006.

Ph.D and Other Theses

[fujii-05:2005]	Taichi Yamada. Graduation Thesis: Object Recognition Under Changing Lighting Conditions, University of Aizu, 2005. Thesis advisor: Robert Fujii
[fujii-06:2005]	Ryoei Wakamatsu. Graduation Thesis: Network Communication Protocols for Autonomous Robots, University of Aizu, 2005. Thesis advisor: Robert Fujii
[fujii-07:2005]	Yu Rikiishi. Graduation Thesis: Graduation Thesis: AIBO Soccer League Ball and Pole Recognition, University of Aizu, 2005. Thesis advisor: Robert Fujii
[fujii-08:2005]	Hiroshi Hasebe. Graduation Thesis: Graduation Thesis: Learning to Intercept and Receive a Soccer Ball for the RoboCup Simulated Soccer Game, University of Aizu, 2005. Thesis advisor: Robert Fujii
[fujii-09:2005]	Akira Matsuzaki. Graduation Thesis: Music Grouping and Metrical Analysis for High Level Structural Understanding, University of Aizu, 2005. Thesis advisor: Robert Fujii
[fujii-10:2005]	Tomohiro Suwa. Graduation Thesis: User Guided Accompaniment re-arrangement System, University of Aizu, 2005. Thesis advisor: Robert Fujii
[miyazaki-24:2005]	Katsumi Onodera. Graduation Thesis: An Autonomous Synchronization Protocol for Sensor Network Nodes, University of Aizu, 2005. Thesis Advisor: T. Miyazaki
[nisim-01:2005]	Tokuhisa Abe. Master Thesis: The Volume Rendering System Using Progressive Volume Data Transmission, University of Aizu, 2006. Thesis Advisor: Satoshi Nishimura
[nisim-02:2005]	Hisao Kaminaga. Master Thesis: Sound Synthesis using Combination, University of Aizu, 2006. Thesis Advisor: Satoshi Nishimura
[nisim-03:2005]	Hitoshi Kojima. Master Thesis: Curve Modeling of Music Parameters, University of Aizu, 2006. Thesis Advisor: Satoshi Nishimura
[nisim-04:2005]	Masayuki Kawaguchi. Graduation Thesis: A New Construction Method of Grids for a Ray-Flow System, University of Aizu, 2006. Thesis Advisor: Satoshi Nishimura
[nisim-05:2005]	Shin ichi Kinuwaki. Graduation Thesis: Photorealistic Image Synthesis Technique for Dynamic Scene, University of Aizu, 2006. Thesis Advisor: Satoshi Nishimura
[nisim-06:2005]	Yusuke Ono. Graduation Thesis: Development and Evaluation of Graphics User Interface for the Samuel Programming Language, University of Aizu, 2006. Thesis Advisor: Satoshi Nishimura
[nisim-07:2005]	Yu Sasaki. Graduation Thesis: Improving Real-Time Ray Tracing on a Ray-Flow System, University of Aizu, 2006. Thesis Advisor: Satoshi Nishimura
[nisim-08:2005]	Makoto Tanji. Graduation Thesis: A Case-Based Performance Rendering System for Expressive Music, University of Aizu, 2006. Thesis Advisor: Satoshi Nishimura
[nisim-09:2005]	Takuya Yoshida. Graduation Thesis: Samuel-DSP: A Real-Time DSP Programming Environment, University of Aizu, 2006. Thesis Advisor: Satoshi Nishimura

Others

[miyazaki-25:2005]

Visiting lecturer, The Tokyo University of Agriculture and Technology

2007 THE UNIVERSITY OF AIZU ALL RIGHTS RESERVED