Principal Investigators: Abderazek Ben Abdallah (PI), Khanh N. Dang (PI)
We are pioneering the development of the NASH chip, an ultra-low-power processing unit designed for real-time cognitive tasks. This research focuses on the integration of 3D Network-on-Chip (NoC) interconnects to overcome the data-movement bottlenecks of conventional 2D architectures. By utilizing adaptive configuration methods, the NASH system allows for on-the-fly adjustment of Spiking Neural Network (SNN) parameters, including synaptic weights and neuronal thresholds. This flexibility enables the hardware to self-optimize for diverse biological signals, bringing high-performance brain-inspired processing to edge-level BCI devices.
ApproxiMorph exploits the inherent noise resilience of Spiking Neural Networks by implementing layer-wise approximation strategies within 3D-stacked IC designs. The framework integrates approximate neuron designs with low-voltage 3D-stacked SRAM to significantly reduce the power-per-synaptic operation. By utilizing a heuristic search algorithm to navigate a massive configuration space (over 1017 options), the system identifies optimal mappings that achieve nearly 30% power reduction with almost no impact on classification performance.
The BTSAM framework introduces a periodic activity scoring system to monitor the workload of 3D-NoC nodes. By applying Seesaw Neuron Clustering (SNC) and a thermal-aware genetic algorithm, the system dynamically redistributes neuronal tasks to eliminate hot spots. This proactive thermal management prevents structural damage and results in a 5K peak temperature reduction and a four-fold increase in Mean-Time-to-Failure (MTTF).
This research tackles the "memory wall" by decoupling synaptic weight storage from processing elements through vertical stacking. By splitting synaptic weights into significant and least-significant subsets across different 3D layers, the system can independently control the supply voltage. This allows for power-gating of memory layers containing less critical data, achieving SOP energy reductions of up to 66%.
R-MaS3N is a mapping framework designed to maintain system integrity in the presence of physical manufacturing defects. When a hardware fault is detected, R-MaS3N facilitates rapid remapping of SNN layers to functional neuronal clusters. The system maintains 100% efficiency even when 40% of hardware nodes are faulty, reducing remapping time by 71 times compared to conventional methods.
